[{"language":[{"iso":"eng"}],"department":[{"_id":"78"}],"date_updated":"2019-10-04T23:07:46Z","_id":"10712","title":"Thread Shadowing: On the Effectiveness of Error Detection at the Hardware Thread Level","status":"public","type":"conference","date_created":"2019-07-10T11:47:25Z","series_title":"ReConFig","user_id":"3118","author":[{"full_name":"Meisner, Sebastian","last_name":"Meisner","first_name":"Sebastian"},{"last_name":"Platzner","full_name":"Platzner, Marco","first_name":"Marco","id":"398"}],"doi":"10.1109/ReConFig.2016.7857193","year":"2016","publication":"Reconfigurable Computing and FPGAs (ReConFig), 2016 International Conference on","page":"1-8","citation":{"short":"S. Meisner, M. Platzner, in: Reconfigurable Computing and FPGAs (ReConFig), 2016 International Conference On, 2016, pp. 1–8.","ama":"Meisner S, Platzner M. Thread Shadowing: On the Effectiveness of Error Detection at the Hardware Thread Level. In: <i>Reconfigurable Computing and FPGAs (ReConFig), 2016 International Conference On</i>. ReConFig. ; 2016:1-8. doi:<a href=\"https://doi.org/10.1109/ReConFig.2016.7857193\">10.1109/ReConFig.2016.7857193</a>","chicago":"Meisner, Sebastian, and Marco Platzner. “Thread Shadowing: On the Effectiveness of Error Detection at the Hardware Thread Level.” In <i>Reconfigurable Computing and FPGAs (ReConFig), 2016 International Conference On</i>, 1–8. ReConFig, 2016. <a href=\"https://doi.org/10.1109/ReConFig.2016.7857193\">https://doi.org/10.1109/ReConFig.2016.7857193</a>.","bibtex":"@inproceedings{Meisner_Platzner_2016, series={ReConFig}, title={Thread Shadowing: On the Effectiveness of Error Detection at the Hardware Thread Level}, DOI={<a href=\"https://doi.org/10.1109/ReConFig.2016.7857193\">10.1109/ReConFig.2016.7857193</a>}, booktitle={Reconfigurable Computing and FPGAs (ReConFig), 2016 International Conference on}, author={Meisner, Sebastian and Platzner, Marco}, year={2016}, pages={1–8}, collection={ReConFig} }","mla":"Meisner, Sebastian, and Marco Platzner. “Thread Shadowing: On the Effectiveness of Error Detection at the Hardware Thread Level.” <i>Reconfigurable Computing and FPGAs (ReConFig), 2016 International Conference On</i>, 2016, pp. 1–8, doi:<a href=\"https://doi.org/10.1109/ReConFig.2016.7857193\">10.1109/ReConFig.2016.7857193</a>.","ieee":"S. Meisner and M. Platzner, “Thread Shadowing: On the Effectiveness of Error Detection at the Hardware Thread Level,” in <i>Reconfigurable Computing and FPGAs (ReConFig), 2016 International Conference on</i>, 2016, pp. 1–8.","apa":"Meisner, S., &#38; Platzner, M. (2016). Thread Shadowing: On the Effectiveness of Error Detection at the Hardware Thread Level. In <i>Reconfigurable Computing and FPGAs (ReConFig), 2016 International Conference on</i> (pp. 1–8). <a href=\"https://doi.org/10.1109/ReConFig.2016.7857193\">https://doi.org/10.1109/ReConFig.2016.7857193</a>"}}]