{"title":"Thread Shadowing: On the Effectiveness of Error Detection at the Hardware Thread Level","year":"2016","department":[{"_id":"78"}],"type":"conference","language":[{"iso":"eng"}],"user_id":"3118","author":[{"full_name":"Meisner, Sebastian","last_name":"Meisner","first_name":"Sebastian"},{"last_name":"Platzner","full_name":"Platzner, Marco","id":"398","first_name":"Marco"}],"_id":"10712","citation":{"apa":"Meisner, S., & Platzner, M. (2016). Thread Shadowing: On the Effectiveness of Error Detection at the Hardware Thread Level. In Reconfigurable Computing and FPGAs (ReConFig), 2016 International Conference on (pp. 1–8). https://doi.org/10.1109/ReConFig.2016.7857193","ieee":"S. Meisner and M. Platzner, “Thread Shadowing: On the Effectiveness of Error Detection at the Hardware Thread Level,” in Reconfigurable Computing and FPGAs (ReConFig), 2016 International Conference on, 2016, pp. 1–8.","chicago":"Meisner, Sebastian, and Marco Platzner. “Thread Shadowing: On the Effectiveness of Error Detection at the Hardware Thread Level.” In Reconfigurable Computing and FPGAs (ReConFig), 2016 International Conference On, 1–8. ReConFig, 2016. https://doi.org/10.1109/ReConFig.2016.7857193.","mla":"Meisner, Sebastian, and Marco Platzner. “Thread Shadowing: On the Effectiveness of Error Detection at the Hardware Thread Level.” Reconfigurable Computing and FPGAs (ReConFig), 2016 International Conference On, 2016, pp. 1–8, doi:10.1109/ReConFig.2016.7857193.","short":"S. Meisner, M. Platzner, in: Reconfigurable Computing and FPGAs (ReConFig), 2016 International Conference On, 2016, pp. 1–8.","bibtex":"@inproceedings{Meisner_Platzner_2016, series={ReConFig}, title={Thread Shadowing: On the Effectiveness of Error Detection at the Hardware Thread Level}, DOI={10.1109/ReConFig.2016.7857193}, booktitle={Reconfigurable Computing and FPGAs (ReConFig), 2016 International Conference on}, author={Meisner, Sebastian and Platzner, Marco}, year={2016}, pages={1–8}, collection={ReConFig} }","ama":"Meisner S, Platzner M. Thread Shadowing: On the Effectiveness of Error Detection at the Hardware Thread Level. In: Reconfigurable Computing and FPGAs (ReConFig), 2016 International Conference On. ReConFig. ; 2016:1-8. doi:10.1109/ReConFig.2016.7857193"},"publication":"Reconfigurable Computing and FPGAs (ReConFig), 2016 International Conference on","page":"1-8","series_title":"ReConFig","date_created":"2019-07-10T11:47:25Z","date_updated":"2022-01-06T06:50:50Z","doi":"10.1109/ReConFig.2016.7857193","status":"public"}