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   	<dc:title>Massive Statistical Process Variations - A Grand Challenge for Testing Nanoelectronic Circuits</dc:title>
   	<dc:creator>Becker, Bernd</dc:creator>
   	<dc:creator>Hellebrand, Sybille</dc:creator>
   	<dc:creator>Polian, Ilia</dc:creator>
   	<dc:creator>Straube, Bernd</dc:creator>
   	<dc:creator>Vermeiren, Wolfgang</dc:creator>
   	<dc:creator>Wunderlich, Hans-Joachim</dc:creator>
   	<dc:publisher>IEEE</dc:publisher>
   	<dc:date>2010</dc:date>
   	<dc:type>info:eu-repo/semantics/conferenceObject</dc:type>
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   	<dc:identifier>https://ris.uni-paderborn.de/record/12987</dc:identifier>
   	<dc:source>Becker B, Hellebrand S, Polian I, Straube B, Vermeiren W, Wunderlich H-J. Massive Statistical Process Variations - A Grand Challenge for Testing Nanoelectronic Circuits. In: &lt;i&gt;40th Annual IEEE/IFIP International Conference on Dependable Systems and Networks Workshops (DSN-W’10)&lt;/i&gt;. Chicago, IL, USA: IEEE; 2010. doi:&lt;a href=&quot;https://doi.org/10.1109/dsnw.2010.5542612&quot;&gt;10.1109/dsnw.2010.5542612&lt;/a&gt;</dc:source>
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