[{"doi":"10.1109/12.364534","title":"Built-In Test for Circuits with Scan Based on Reseeding of Multiple-Polynomial Linear Feedback Shift Registers","author":[{"first_name":"Sybille","orcid":"0000-0002-3717-3939","last_name":"Hellebrand","full_name":"Hellebrand, Sybille","id":"209"},{"first_name":"Janusz","last_name":"Rajski","full_name":"Rajski, Janusz"},{"first_name":"Steffen","last_name":"Tarnick","full_name":"Tarnick, Steffen"},{"last_name":"Venkataraman","full_name":"Venkataraman, Srikanth","first_name":"Srikanth"},{"first_name":"B.","full_name":"Courtois, B.","last_name":"Courtois"}],"date_created":"2019-08-28T10:26:37Z","volume":44,"date_updated":"2022-05-11T16:55:15Z","publisher":"IEEE","citation":{"mla":"Hellebrand, Sybille, et al. “Built-In Test for Circuits with Scan Based on Reseeding of Multiple-Polynomial Linear Feedback Shift Registers.” <i>IEEE Transactions on Computers</i>, vol. 44, no. 2, IEEE, 1995, pp. 223–33, doi:<a href=\"https://doi.org/10.1109/12.364534\">10.1109/12.364534</a>.","short":"S. Hellebrand, J. Rajski, S. Tarnick, S. Venkataraman, B. Courtois, IEEE Transactions on Computers 44 (1995) 223–233.","bibtex":"@article{Hellebrand_Rajski_Tarnick_Venkataraman_Courtois_1995, title={Built-In Test for Circuits with Scan Based on Reseeding of Multiple-Polynomial Linear Feedback Shift Registers}, volume={44}, DOI={<a href=\"https://doi.org/10.1109/12.364534\">10.1109/12.364534</a>}, number={2}, journal={IEEE Transactions on Computers}, publisher={IEEE}, author={Hellebrand, Sybille and Rajski, Janusz and Tarnick, Steffen and Venkataraman, Srikanth and Courtois, B.}, year={1995}, pages={223–233} }","apa":"Hellebrand, S., Rajski, J., Tarnick, S., Venkataraman, S., &#38; Courtois, B. (1995). Built-In Test for Circuits with Scan Based on Reseeding of Multiple-Polynomial Linear Feedback Shift Registers. <i>IEEE Transactions on Computers</i>, <i>44</i>(2), 223–233. <a href=\"https://doi.org/10.1109/12.364534\">https://doi.org/10.1109/12.364534</a>","ieee":"S. Hellebrand, J. Rajski, S. Tarnick, S. Venkataraman, and B. Courtois, “Built-In Test for Circuits with Scan Based on Reseeding of Multiple-Polynomial Linear Feedback Shift Registers,” <i>IEEE Transactions on Computers</i>, vol. 44, no. 2, pp. 223–233, 1995, doi: <a href=\"https://doi.org/10.1109/12.364534\">10.1109/12.364534</a>.","chicago":"Hellebrand, Sybille, Janusz Rajski, Steffen Tarnick, Srikanth Venkataraman, and B. Courtois. “Built-In Test for Circuits with Scan Based on Reseeding of Multiple-Polynomial Linear Feedback Shift Registers.” <i>IEEE Transactions on Computers</i> 44, no. 2 (1995): 223–33. <a href=\"https://doi.org/10.1109/12.364534\">https://doi.org/10.1109/12.364534</a>.","ama":"Hellebrand S, Rajski J, Tarnick S, Venkataraman S, Courtois B. Built-In Test for Circuits with Scan Based on Reseeding of Multiple-Polynomial Linear Feedback Shift Registers. <i>IEEE Transactions on Computers</i>. 1995;44(2):223-233. doi:<a href=\"https://doi.org/10.1109/12.364534\">10.1109/12.364534</a>"},"intvolume":"        44","page":"223-233","year":"1995","issue":"2","language":[{"iso":"eng"}],"extern":"1","user_id":"209","department":[{"_id":"48"}],"_id":"13011","status":"public","type":"journal_article","publication":"IEEE Transactions on Computers"}]