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<titleInfo><title>Built-In Test for Circuits with Scan Based on Reseeding of Multiple-Polynomial Linear Feedback Shift Registers</title></titleInfo>





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  <namePart type="given">Sybille</namePart>
  <namePart type="family">Hellebrand</namePart>
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<name type="personal">
  <namePart type="given">Janusz</namePart>
  <namePart type="family">Rajski</namePart>
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  <namePart type="given">Steffen</namePart>
  <namePart type="family">Tarnick</namePart>
  <role><roleTerm type="text">author</roleTerm> </role></name>
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  <namePart type="given">Srikanth</namePart>
  <namePart type="family">Venkataraman</namePart>
  <role><roleTerm type="text">author</roleTerm> </role></name>
<name type="personal">
  <namePart type="given">B.</namePart>
  <namePart type="family">Courtois</namePart>
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<originInfo><publisher>IEEE</publisher><dateIssued encoding="w3cdtf">1995</dateIssued>
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<relatedItem type="host"><titleInfo><title>IEEE Transactions on Computers</title></titleInfo><identifier type="doi">10.1109/12.364534</identifier>
<part><detail type="volume"><number>44</number></detail><detail type="issue"><number>2</number></detail><extent unit="pages">223-233</extent>
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<ieee>S. Hellebrand, J. Rajski, S. Tarnick, S. Venkataraman, and B. Courtois, “Built-In Test for Circuits with Scan Based on Reseeding of Multiple-Polynomial Linear Feedback Shift Registers,” &lt;i&gt;IEEE Transactions on Computers&lt;/i&gt;, vol. 44, no. 2, pp. 223–233, 1995, doi: &lt;a href=&quot;https://doi.org/10.1109/12.364534&quot;&gt;10.1109/12.364534&lt;/a&gt;.</ieee>
<chicago>Hellebrand, Sybille, Janusz Rajski, Steffen Tarnick, Srikanth Venkataraman, and B. Courtois. “Built-In Test for Circuits with Scan Based on Reseeding of Multiple-Polynomial Linear Feedback Shift Registers.” &lt;i&gt;IEEE Transactions on Computers&lt;/i&gt; 44, no. 2 (1995): 223–33. &lt;a href=&quot;https://doi.org/10.1109/12.364534&quot;&gt;https://doi.org/10.1109/12.364534&lt;/a&gt;.</chicago>
<ama>Hellebrand S, Rajski J, Tarnick S, Venkataraman S, Courtois B. Built-In Test for Circuits with Scan Based on Reseeding of Multiple-Polynomial Linear Feedback Shift Registers. &lt;i&gt;IEEE Transactions on Computers&lt;/i&gt;. 1995;44(2):223-233. doi:&lt;a href=&quot;https://doi.org/10.1109/12.364534&quot;&gt;10.1109/12.364534&lt;/a&gt;</ama>
<bibtex>@article{Hellebrand_Rajski_Tarnick_Venkataraman_Courtois_1995, title={Built-In Test for Circuits with Scan Based on Reseeding of Multiple-Polynomial Linear Feedback Shift Registers}, volume={44}, DOI={&lt;a href=&quot;https://doi.org/10.1109/12.364534&quot;&gt;10.1109/12.364534&lt;/a&gt;}, number={2}, journal={IEEE Transactions on Computers}, publisher={IEEE}, author={Hellebrand, Sybille and Rajski, Janusz and Tarnick, Steffen and Venkataraman, Srikanth and Courtois, B.}, year={1995}, pages={223–233} }</bibtex>
<short>S. Hellebrand, J. Rajski, S. Tarnick, S. Venkataraman, B. Courtois, IEEE Transactions on Computers 44 (1995) 223–233.</short>
<mla>Hellebrand, Sybille, et al. “Built-In Test for Circuits with Scan Based on Reseeding of Multiple-Polynomial Linear Feedback Shift Registers.” &lt;i&gt;IEEE Transactions on Computers&lt;/i&gt;, vol. 44, no. 2, IEEE, 1995, pp. 223–33, doi:&lt;a href=&quot;https://doi.org/10.1109/12.364534&quot;&gt;10.1109/12.364534&lt;/a&gt;.</mla>
<apa>Hellebrand, S., Rajski, J., Tarnick, S., Venkataraman, S., &amp;#38; Courtois, B. (1995). Built-In Test for Circuits with Scan Based on Reseeding of Multiple-Polynomial Linear Feedback Shift Registers. &lt;i&gt;IEEE Transactions on Computers&lt;/i&gt;, &lt;i&gt;44&lt;/i&gt;(2), 223–233. &lt;a href=&quot;https://doi.org/10.1109/12.364534&quot;&gt;https://doi.org/10.1109/12.364534&lt;/a&gt;</apa>
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