---
_id: '13011'
author:
- first_name: Sybille
  full_name: Hellebrand, Sybille
  id: '209'
  last_name: Hellebrand
  orcid: 0000-0002-3717-3939
- first_name: Janusz
  full_name: Rajski, Janusz
  last_name: Rajski
- first_name: Steffen
  full_name: Tarnick, Steffen
  last_name: Tarnick
- first_name: Srikanth
  full_name: Venkataraman, Srikanth
  last_name: Venkataraman
- first_name: B.
  full_name: Courtois, B.
  last_name: Courtois
citation:
  ama: Hellebrand S, Rajski J, Tarnick S, Venkataraman S, Courtois B. Built-In Test
    for Circuits with Scan Based on Reseeding of Multiple-Polynomial Linear Feedback
    Shift Registers. <i>IEEE Transactions on Computers</i>. 1995;44(2):223-233. doi:<a
    href="https://doi.org/10.1109/12.364534">10.1109/12.364534</a>
  apa: Hellebrand, S., Rajski, J., Tarnick, S., Venkataraman, S., &#38; Courtois,
    B. (1995). Built-In Test for Circuits with Scan Based on Reseeding of Multiple-Polynomial
    Linear Feedback Shift Registers. <i>IEEE Transactions on Computers</i>, <i>44</i>(2),
    223–233. <a href="https://doi.org/10.1109/12.364534">https://doi.org/10.1109/12.364534</a>
  bibtex: '@article{Hellebrand_Rajski_Tarnick_Venkataraman_Courtois_1995, title={Built-In
    Test for Circuits with Scan Based on Reseeding of Multiple-Polynomial Linear Feedback
    Shift Registers}, volume={44}, DOI={<a href="https://doi.org/10.1109/12.364534">10.1109/12.364534</a>},
    number={2}, journal={IEEE Transactions on Computers}, publisher={IEEE}, author={Hellebrand,
    Sybille and Rajski, Janusz and Tarnick, Steffen and Venkataraman, Srikanth and
    Courtois, B.}, year={1995}, pages={223–233} }'
  chicago: 'Hellebrand, Sybille, Janusz Rajski, Steffen Tarnick, Srikanth Venkataraman,
    and B. Courtois. “Built-In Test for Circuits with Scan Based on Reseeding of Multiple-Polynomial
    Linear Feedback Shift Registers.” <i>IEEE Transactions on Computers</i> 44, no.
    2 (1995): 223–33. <a href="https://doi.org/10.1109/12.364534">https://doi.org/10.1109/12.364534</a>.'
  ieee: 'S. Hellebrand, J. Rajski, S. Tarnick, S. Venkataraman, and B. Courtois, “Built-In
    Test for Circuits with Scan Based on Reseeding of Multiple-Polynomial Linear Feedback
    Shift Registers,” <i>IEEE Transactions on Computers</i>, vol. 44, no. 2, pp. 223–233,
    1995, doi: <a href="https://doi.org/10.1109/12.364534">10.1109/12.364534</a>.'
  mla: Hellebrand, Sybille, et al. “Built-In Test for Circuits with Scan Based on
    Reseeding of Multiple-Polynomial Linear Feedback Shift Registers.” <i>IEEE Transactions
    on Computers</i>, vol. 44, no. 2, IEEE, 1995, pp. 223–33, doi:<a href="https://doi.org/10.1109/12.364534">10.1109/12.364534</a>.
  short: S. Hellebrand, J. Rajski, S. Tarnick, S. Venkataraman, B. Courtois, IEEE
    Transactions on Computers 44 (1995) 223–233.
date_created: 2019-08-28T10:26:37Z
date_updated: 2022-05-11T16:55:15Z
department:
- _id: '48'
doi: 10.1109/12.364534
extern: '1'
intvolume: '        44'
issue: '2'
language:
- iso: eng
page: 223-233
publication: IEEE Transactions on Computers
publisher: IEEE
status: public
title: Built-In Test for Circuits with Scan Based on Reseeding of Multiple-Polynomial
  Linear Feedback Shift Registers
type: journal_article
user_id: '209'
volume: 44
year: '1995'
...