{"language":[{"iso":"eng"}],"place":"17th GI/ITG/GMM Workshop \"Testmethoden und Zuverlässigkeit von Schaltungen und Systemen\", Innsbruck, Austria","department":[{"_id":"48"}],"author":[{"last_name":"Oehler","full_name":"Oehler, Philipp","first_name":"Philipp"},{"first_name":"Sybille","id":"209","full_name":"Hellebrand, Sybille","orcid":"0000-0002-3717-3939","last_name":"Hellebrand"}],"status":"public","type":"misc","date_updated":"2022-01-06T06:51:28Z","date_created":"2019-08-28T12:23:10Z","year":"2005","keyword":["WORKSHOP"],"citation":{"bibtex":"@book{Oehler_Hellebrand_2005, place={17th GI/ITG/GMM Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen”, Innsbruck, Austria}, title={Power Consumption Versus Error Correcting Capabilities in Embedded DRAMs - A Case Study}, author={Oehler, Philipp and Hellebrand, Sybille}, year={2005} }","ieee":"P. Oehler and S. Hellebrand, <i>Power Consumption Versus Error Correcting Capabilities in Embedded DRAMs - A Case Study</i>. 17th GI/ITG/GMM Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen”, Innsbruck, Austria, 2005.","mla":"Oehler, Philipp, and Sybille Hellebrand. <i>Power Consumption Versus Error Correcting Capabilities in Embedded DRAMs - A Case Study</i>. 2005.","ama":"Oehler P, Hellebrand S. <i>Power Consumption Versus Error Correcting Capabilities in Embedded DRAMs - A Case Study</i>. 17th GI/ITG/GMM Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen”, Innsbruck, Austria; 2005.","apa":"Oehler, P., &#38; Hellebrand, S. (2005). <i>Power Consumption Versus Error Correcting Capabilities in Embedded DRAMs - A Case Study</i>. 17th GI/ITG/GMM Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen”, Innsbruck, Austria.","chicago":"Oehler, Philipp, and Sybille Hellebrand. <i>Power Consumption Versus Error Correcting Capabilities in Embedded DRAMs - A Case Study</i>. 17th GI/ITG/GMM Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen”, Innsbruck, Austria, 2005.","short":"P. Oehler, S. Hellebrand, Power Consumption Versus Error Correcting Capabilities in Embedded DRAMs - A Case Study, 17th GI/ITG/GMM Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen”, Innsbruck, Austria, 2005."},"title":"Power Consumption Versus Error Correcting Capabilities in Embedded DRAMs - A Case Study","_id":"13102","user_id":"659"}