{"user_id":"477","citation":{"apa":"Wiersema, T., &#38; Platzner, M. (2016). Verifying Worst-Case Completion Times for Reconfigurable Hardware Modules using Proof-Carrying Hardware. In <i>Proceedings of the 11th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC 2016)</i> (pp. 1--8). <a href=\"https://doi.org/10.1109/ReCoSoC.2016.7533910\">https://doi.org/10.1109/ReCoSoC.2016.7533910</a>","chicago":"Wiersema, Tobias, and Marco Platzner. “Verifying Worst-Case Completion Times for Reconfigurable Hardware Modules Using Proof-Carrying Hardware.” In <i>Proceedings of the 11th International Symposium on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC 2016)</i>, 1--8, 2016. <a href=\"https://doi.org/10.1109/ReCoSoC.2016.7533910\">https://doi.org/10.1109/ReCoSoC.2016.7533910</a>.","ama":"Wiersema T, Platzner M. Verifying Worst-Case Completion Times for Reconfigurable Hardware Modules using Proof-Carrying Hardware. In: <i>Proceedings of the 11th International Symposium on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC 2016)</i>. ; 2016:1--8. doi:<a href=\"https://doi.org/10.1109/ReCoSoC.2016.7533910\">10.1109/ReCoSoC.2016.7533910</a>","ieee":"T. Wiersema and M. Platzner, “Verifying Worst-Case Completion Times for Reconfigurable Hardware Modules using Proof-Carrying Hardware,” in <i>Proceedings of the 11th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC 2016)</i>, 2016, pp. 1--8.","bibtex":"@inproceedings{Wiersema_Platzner_2016, title={Verifying Worst-Case Completion Times for Reconfigurable Hardware Modules using Proof-Carrying Hardware}, DOI={<a href=\"https://doi.org/10.1109/ReCoSoC.2016.7533910\">10.1109/ReCoSoC.2016.7533910</a>}, booktitle={Proceedings of the 11th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC 2016)}, author={Wiersema, Tobias and Platzner, Marco}, year={2016}, pages={1--8} }","mla":"Wiersema, Tobias, and Marco Platzner. “Verifying Worst-Case Completion Times for Reconfigurable Hardware Modules Using Proof-Carrying Hardware.” <i>Proceedings of the 11th International Symposium on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC 2016)</i>, 2016, pp. 1--8, doi:<a href=\"https://doi.org/10.1109/ReCoSoC.2016.7533910\">10.1109/ReCoSoC.2016.7533910</a>.","short":"T. Wiersema, M. Platzner, in: Proceedings of the 11th International Symposium on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC 2016), 2016, pp. 1--8."},"project":[{"_id":"1","name":"SFB 901"},{"_id":"12","name":"SFB 901 - Subprojekt B4"},{"name":"SFB 901 - Project Area B","_id":"3"}],"file":[{"creator":"florida","file_name":"132-07533910.pdf","date_updated":"2018-03-21T13:02:30Z","file_size":911171,"success":1,"date_created":"2018-03-21T13:02:30Z","file_id":"1562","access_level":"closed","content_type":"application/pdf","relation":"main_file"}],"department":[{"_id":"78"}],"abstract":[{"lang":"eng","text":"Runtime reconfiguration can be used to replace hardware modules in the field and even to continuously improve them during operation. Runtime reconfiguration poses new challenges for validation, since the required properties of newly arriving modules may be difficult to check fast enough to sustain the intended system dynamics. In this paper we present a method for just-in-time verification of the worst-case completion time of a reconfigurable hardware module. We assume so-called run-to-completion modules that exhibit start and done signals indicating the start and end of execution, respectively. We present a formal verification approach that exploits the concept of proof-carrying hardware. The approach tasks the creator of a hardware module with constructing a proof of the worst-case completion time, which can then easily be checked by the user of the module, just prior to reconfiguration. After explaining the verification approach and a corresponding tool flow, we present results from two case studies, a short term synthesis filter and a multihead weigher. The resultsclearly show that cost of verifying the completion time of the module is paid by the creator instead of the user of the module."}],"doi":"10.1109/ReCoSoC.2016.7533910","ddc":["040"],"year":"2016","language":[{"iso":"eng"}],"_id":"132","date_updated":"2022-01-06T06:51:30Z","author":[{"first_name":"Tobias","id":"3118","full_name":"Wiersema, Tobias","last_name":"Wiersema"},{"id":"398","first_name":"Marco","last_name":"Platzner","full_name":"Platzner, Marco"}],"status":"public","has_accepted_license":"1","date_created":"2017-10-17T12:41:17Z","title":"Verifying Worst-Case Completion Times for Reconfigurable Hardware Modules using Proof-Carrying Hardware","publication":"Proceedings of the 11th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC 2016)","file_date_updated":"2018-03-21T13:02:30Z","page":"1--8","type":"conference"}