{"publication_status":"published","department":[{"_id":"101"}],"publication_identifier":{"isbn":["9781424443109","9781424443116"]},"author":[{"full_name":"Blesken, Matthias","last_name":"Blesken","first_name":"Matthias"},{"last_name":"Ruckert","full_name":"Ruckert, Ulrich","first_name":"Ulrich"},{"last_name":"Steenken","full_name":"Steenken, Dominik","first_name":"Dominik"},{"full_name":"Witting, Katrin","last_name":"Witting","first_name":"Katrin"},{"first_name":"Michael","full_name":"Dellnitz, Michael","last_name":"Dellnitz"}],"year":"2009","user_id":"15701","citation":{"bibtex":"@inproceedings{Blesken_Ruckert_Steenken_Witting_Dellnitz_2009, title={Multiobjective optimization for transistor sizing of CMOS logic standard cells using set-oriented numerical techniques}, DOI={10.1109/norchp.2009.5397800}, booktitle={2009 NORCHIP}, author={Blesken, Matthias and Ruckert, Ulrich and Steenken, Dominik and Witting, Katrin and Dellnitz, Michael}, year={2009} }","mla":"Blesken, Matthias, et al. “Multiobjective Optimization for Transistor Sizing of CMOS Logic Standard Cells Using Set-Oriented Numerical Techniques.” 2009 NORCHIP, 2009, doi:10.1109/norchp.2009.5397800.","short":"M. Blesken, U. Ruckert, D. Steenken, K. Witting, M. Dellnitz, in: 2009 NORCHIP, 2009.","chicago":"Blesken, Matthias, Ulrich Ruckert, Dominik Steenken, Katrin Witting, and Michael Dellnitz. “Multiobjective Optimization for Transistor Sizing of CMOS Logic Standard Cells Using Set-Oriented Numerical Techniques.” In 2009 NORCHIP, 2009. https://doi.org/10.1109/norchp.2009.5397800.","apa":"Blesken, M., Ruckert, U., Steenken, D., Witting, K., & Dellnitz, M. (2009). Multiobjective optimization for transistor sizing of CMOS logic standard cells using set-oriented numerical techniques. In 2009 NORCHIP. https://doi.org/10.1109/norchp.2009.5397800","ieee":"M. Blesken, U. Ruckert, D. Steenken, K. Witting, and M. Dellnitz, “Multiobjective optimization for transistor sizing of CMOS logic standard cells using set-oriented numerical techniques,” in 2009 NORCHIP, 2009.","ama":"Blesken M, Ruckert U, Steenken D, Witting K, Dellnitz M. Multiobjective optimization for transistor sizing of CMOS logic standard cells using set-oriented numerical techniques. In: 2009 NORCHIP. ; 2009. doi:10.1109/norchp.2009.5397800"},"type":"conference","publication":"2009 NORCHIP","date_updated":"2022-01-06T06:52:52Z","_id":"16524","language":[{"iso":"eng"}],"title":"Multiobjective optimization for transistor sizing of CMOS logic standard cells using set-oriented numerical techniques","doi":"10.1109/norchp.2009.5397800","status":"public","date_created":"2020-04-15T08:11:10Z"}