{"ddc":["000"],"publication_status":"published","issue":"3","doi":"10.1145/3053687","page":"24:1-24:23","file":[{"relation":"main_file","access_level":"closed","content_type":"application/pdf","creator":"ups","file_size":2131617,"date_created":"2018-11-02T16:04:14Z","date_updated":"2018-11-02T16:04:14Z","success":1,"file_name":"a24-riebler.pdf","file_id":"5322"}],"has_accepted_license":"1","project":[{"name":"SFB 901","grant_number":"160364472","_id":"1"},{"name":"SFB 901 - Project Area C","_id":"4"},{"grant_number":"160364472","_id":"14","name":"SFB 901 - Subproject C2"},{"name":"Self-Adaptive Virtualisation-Aware High-Performance/Low-Energy Heterogeneous System Architectures","_id":"34","grant_number":"610996"},{"_id":"52","name":"Computing Resources Provided by the Paderborn Center for Parallel Computing"}],"quality_controlled":"1","abstract":[{"lang":"eng","text":"Branch and bound (B&B) algorithms structure the search space as a tree and eliminate infeasible solutions early by pruning subtrees that cannot lead to a valid or optimal solution. Custom hardware designs significantly accelerate the execution of these algorithms. In this article, we demonstrate a high-performance B&B implementation on FPGAs. First, we identify general elements of B&B algorithms and describe their implementation as a finite state machine. Then, we introduce workers that autonomously cooperate using work stealing to allow parallel execution and full utilization of the target FPGA. Finally, we explore advantages of instance-specific designs that target a specific problem instance to improve performance.\r\n\r\nWe evaluate our concepts by applying them to a branch and bound problem, the reconstruction of corrupted AES keys obtained from cold-boot attacks. The evaluation shows that our work stealing approach is scalable with the available resources and provides speedups proportional to the number of workers. Instance-specific designs allow us to achieve an overall speedup of 47 × compared to the fastest implementation of AES key reconstruction so far. Finally, we demonstrate how instance-specific designs can be generated just-in-time such that the provided speedups outweigh the additional time required for design synthesis."}],"keyword":["coldboot"],"file_date_updated":"2018-11-02T16:04:14Z","date_created":"2017-07-25T14:17:32Z","language":[{"iso":"eng"}],"type":"journal_article","date_updated":"2023-09-26T13:23:58Z","publication":"ACM Transactions on Reconfigurable Technology and Systems (TRETS)","status":"public","intvolume":"        10","year":"2017","author":[{"first_name":"Heinrich","full_name":"Riebler, Heinrich","id":"8961","last_name":"Riebler"},{"id":"24135","last_name":"Lass","full_name":"Lass, Michael","first_name":"Michael","orcid":"0000-0002-5708-7632"},{"last_name":"Mittendorf","full_name":"Mittendorf, Robert","first_name":"Robert"},{"full_name":"Löcke, Thomas","last_name":"Löcke","first_name":"Thomas"},{"full_name":"Plessl, Christian","id":"16153","last_name":"Plessl","orcid":"0000-0001-5728-9982","first_name":"Christian"}],"publisher":"Association for Computing Machinery (ACM)","_id":"18","title":"Efficient Branch and Bound on FPGAs Using Work Stealing and Instance-Specific Designs","publication_identifier":{"issn":["1936-7406"]},"department":[{"_id":"27"},{"_id":"518"}],"volume":10,"user_id":"15278","citation":{"ieee":"H. Riebler, M. Lass, R. Mittendorf, T. Löcke, and C. Plessl, “Efficient Branch and Bound on FPGAs Using Work Stealing and Instance-Specific Designs,” <i>ACM Transactions on Reconfigurable Technology and Systems (TRETS)</i>, vol. 10, no. 3, p. 24:1-24:23, 2017, doi: <a href=\"https://doi.org/10.1145/3053687\">10.1145/3053687</a>.","mla":"Riebler, Heinrich, et al. “Efficient Branch and Bound on FPGAs Using Work Stealing and Instance-Specific Designs.” <i>ACM Transactions on Reconfigurable Technology and Systems (TRETS)</i>, vol. 10, no. 3, Association for Computing Machinery (ACM), 2017, p. 24:1-24:23, doi:<a href=\"https://doi.org/10.1145/3053687\">10.1145/3053687</a>.","bibtex":"@article{Riebler_Lass_Mittendorf_Löcke_Plessl_2017, title={Efficient Branch and Bound on FPGAs Using Work Stealing and Instance-Specific Designs}, volume={10}, DOI={<a href=\"https://doi.org/10.1145/3053687\">10.1145/3053687</a>}, number={3}, journal={ACM Transactions on Reconfigurable Technology and Systems (TRETS)}, publisher={Association for Computing Machinery (ACM)}, author={Riebler, Heinrich and Lass, Michael and Mittendorf, Robert and Löcke, Thomas and Plessl, Christian}, year={2017}, pages={24:1-24:23} }","ama":"Riebler H, Lass M, Mittendorf R, Löcke T, Plessl C. Efficient Branch and Bound on FPGAs Using Work Stealing and Instance-Specific Designs. <i>ACM Transactions on Reconfigurable Technology and Systems (TRETS)</i>. 2017;10(3):24:1-24:23. doi:<a href=\"https://doi.org/10.1145/3053687\">10.1145/3053687</a>","apa":"Riebler, H., Lass, M., Mittendorf, R., Löcke, T., &#38; Plessl, C. (2017). Efficient Branch and Bound on FPGAs Using Work Stealing and Instance-Specific Designs. <i>ACM Transactions on Reconfigurable Technology and Systems (TRETS)</i>, <i>10</i>(3), 24:1-24:23. <a href=\"https://doi.org/10.1145/3053687\">https://doi.org/10.1145/3053687</a>","short":"H. Riebler, M. Lass, R. Mittendorf, T. Löcke, C. Plessl, ACM Transactions on Reconfigurable Technology and Systems (TRETS) 10 (2017) 24:1-24:23.","chicago":"Riebler, Heinrich, Michael Lass, Robert Mittendorf, Thomas Löcke, and Christian Plessl. “Efficient Branch and Bound on FPGAs Using Work Stealing and Instance-Specific Designs.” <i>ACM Transactions on Reconfigurable Technology and Systems (TRETS)</i> 10, no. 3 (2017): 24:1-24:23. <a href=\"https://doi.org/10.1145/3053687\">https://doi.org/10.1145/3053687</a>."}}