{"date_updated":"2022-01-06T06:56:07Z","status":"public","author":[{"full_name":"Plessl, Christian","last_name":"Plessl","first_name":"Christian","id":"16153","orcid":"0000-0001-5728-9982"},{"full_name":"Platzner, Marco","last_name":"Platzner","id":"398","first_name":"Marco"}],"year":"2005","_id":"2411","type":"conference","page":"213-218","title":"Zippy – A coarse-grained reconfigurable array with support for hardware virtualization","date_created":"2018-04-17T14:34:03Z","publication":"Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP)","keyword":["Zippy"],"department":[{"_id":"518"},{"_id":"78"}],"user_id":"24135","citation":{"ama":"Plessl C, Platzner M. Zippy – A coarse-grained reconfigurable array with support for hardware virtualization. In: <i>Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP)</i>. IEEE Computer Society; 2005:213-218. doi:<a href=\"https://doi.org/10.1109/ASAP.2005.69\">10.1109/ASAP.2005.69</a>","bibtex":"@inproceedings{Plessl_Platzner_2005, title={Zippy – A coarse-grained reconfigurable array with support for hardware virtualization}, DOI={<a href=\"https://doi.org/10.1109/ASAP.2005.69\">10.1109/ASAP.2005.69</a>}, booktitle={Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP)}, publisher={IEEE Computer Society}, author={Plessl, Christian and Platzner, Marco}, year={2005}, pages={213–218} }","chicago":"Plessl, Christian, and Marco Platzner. “Zippy – A Coarse-Grained Reconfigurable Array with Support for Hardware Virtualization.” In <i>Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP)</i>, 213–18. IEEE Computer Society, 2005. <a href=\"https://doi.org/10.1109/ASAP.2005.69\">https://doi.org/10.1109/ASAP.2005.69</a>.","short":"C. Plessl, M. Platzner, in: Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), IEEE Computer Society, 2005, pp. 213–218.","apa":"Plessl, C., &#38; Platzner, M. (2005). Zippy – A coarse-grained reconfigurable array with support for hardware virtualization. In <i>Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP)</i> (pp. 213–218). IEEE Computer Society. <a href=\"https://doi.org/10.1109/ASAP.2005.69\">https://doi.org/10.1109/ASAP.2005.69</a>","ieee":"C. Plessl and M. Platzner, “Zippy – A coarse-grained reconfigurable array with support for hardware virtualization,” in <i>Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP)</i>, 2005, pp. 213–218.","mla":"Plessl, Christian, and Marco Platzner. “Zippy – A Coarse-Grained Reconfigurable Array with Support for Hardware Virtualization.” <i>Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP)</i>, IEEE Computer Society, 2005, pp. 213–18, doi:<a href=\"https://doi.org/10.1109/ASAP.2005.69\">10.1109/ASAP.2005.69</a>."},"publisher":"IEEE Computer Society","doi":"10.1109/ASAP.2005.69","abstract":[{"lang":"eng","text":" This paper motivates the use of hardware virtualization on coarse-grained reconfigurable architectures. We introduce Zippy, a coarse-grained multi-context hybrid CPU with architectural support for efficient hardware virtualization. The architectural details and the corresponding tool flow are outlined. As a case study, we compare the non-virtualized and the virtualized execution of an ADPCM decoder. "}]}