---
_id: '2411'
abstract:
- lang: eng
  text: ' This paper motivates the use of hardware virtualization on coarse-grained
    reconfigurable architectures. We introduce Zippy, a coarse-grained multi-context
    hybrid CPU with architectural support for efficient hardware virtualization. The
    architectural details and the corresponding tool flow are outlined. As a case
    study, we compare the non-virtualized and the virtualized execution of an ADPCM
    decoder. '
author:
- first_name: Christian
  full_name: Plessl, Christian
  id: '16153'
  last_name: Plessl
  orcid: 0000-0001-5728-9982
- first_name: Marco
  full_name: Platzner, Marco
  id: '398'
  last_name: Platzner
citation:
  ama: 'Plessl C, Platzner M. Zippy – A coarse-grained reconfigurable array with support
    for hardware virtualization. In: <i>Proc. Int. Conf. on Application-Specific Systems,
    Architectures, and Processors (ASAP)</i>. IEEE Computer Society; 2005:213-218.
    doi:<a href="https://doi.org/10.1109/ASAP.2005.69">10.1109/ASAP.2005.69</a>'
  apa: Plessl, C., &#38; Platzner, M. (2005). Zippy – A coarse-grained reconfigurable
    array with support for hardware virtualization. In <i>Proc. Int. Conf. on Application-Specific
    Systems, Architectures, and Processors (ASAP)</i> (pp. 213–218). IEEE Computer
    Society. <a href="https://doi.org/10.1109/ASAP.2005.69">https://doi.org/10.1109/ASAP.2005.69</a>
  bibtex: '@inproceedings{Plessl_Platzner_2005, title={Zippy – A coarse-grained reconfigurable
    array with support for hardware virtualization}, DOI={<a href="https://doi.org/10.1109/ASAP.2005.69">10.1109/ASAP.2005.69</a>},
    booktitle={Proc. Int. Conf. on Application-Specific Systems, Architectures, and
    Processors (ASAP)}, publisher={IEEE Computer Society}, author={Plessl, Christian
    and Platzner, Marco}, year={2005}, pages={213–218} }'
  chicago: Plessl, Christian, and Marco Platzner. “Zippy – A Coarse-Grained Reconfigurable
    Array with Support for Hardware Virtualization.” In <i>Proc. Int. Conf. on Application-Specific
    Systems, Architectures, and Processors (ASAP)</i>, 213–18. IEEE Computer Society,
    2005. <a href="https://doi.org/10.1109/ASAP.2005.69">https://doi.org/10.1109/ASAP.2005.69</a>.
  ieee: C. Plessl and M. Platzner, “Zippy – A coarse-grained reconfigurable array
    with support for hardware virtualization,” in <i>Proc. Int. Conf. on Application-Specific
    Systems, Architectures, and Processors (ASAP)</i>, 2005, pp. 213–218.
  mla: Plessl, Christian, and Marco Platzner. “Zippy – A Coarse-Grained Reconfigurable
    Array with Support for Hardware Virtualization.” <i>Proc. Int. Conf. on Application-Specific
    Systems, Architectures, and Processors (ASAP)</i>, IEEE Computer Society, 2005,
    pp. 213–18, doi:<a href="https://doi.org/10.1109/ASAP.2005.69">10.1109/ASAP.2005.69</a>.
  short: 'C. Plessl, M. Platzner, in: Proc. Int. Conf. on Application-Specific Systems,
    Architectures, and Processors (ASAP), IEEE Computer Society, 2005, pp. 213–218.'
date_created: 2018-04-17T14:34:03Z
date_updated: 2022-01-06T06:56:07Z
department:
- _id: '518'
- _id: '78'
doi: 10.1109/ASAP.2005.69
keyword:
- Zippy
page: 213-218
publication: Proc. Int. Conf. on Application-Specific Systems, Architectures, and
  Processors (ASAP)
publisher: IEEE Computer Society
status: public
title: Zippy – A coarse-grained reconfigurable array with support for hardware virtualization
type: conference
user_id: '24135'
year: '2005'
...