[{"date_updated":"2022-01-06T06:56:09Z","author":[{"full_name":"Adelt, Peer","first_name":"Peer","last_name":"Adelt","id":"5603"},{"id":"25260","full_name":"Koppelmann, Bastian","last_name":"Koppelmann","first_name":"Bastian"},{"full_name":"Müller, Wolfgang","last_name":"Müller","first_name":"Wolfgang","id":"16243"}],"conference":{"location":"Munich, DE"},"year":"2018","status":"public","title":"Current and Future RISC-V Activities for Virtual Prototyping and Chip Design","volume":"Presentation","user_id":"15931","_id":"24194","language":[{"iso":"eng"}],"related_material":{"link":[{"url":"https://www.edacentrum.de/compact/current-and-future-risc-v-activities-virtual-prototyping-and-chip-design","relation":"confirmation"}]},"citation":{"chicago":"Adelt, Peer, Bastian Koppelmann, and Wolfgang Müller. “Current and Future RISC-V Activities for Virtual Prototyping and Chip Design.” <i>International Workshop on RISC-V Research Activities</i> Presentation (2018).","short":"P. Adelt, B. Koppelmann, W. Müller, International Workshop on RISC-V Research Activities Presentation (2018).","ama":"Adelt P, Koppelmann B, Müller W. Current and Future RISC-V Activities for Virtual Prototyping and Chip Design. <i>International Workshop on RISC-V Research Activities</i>. 2018;Presentation.","bibtex":"@article{Adelt_Koppelmann_Müller_2018, title={Current and Future RISC-V Activities for Virtual Prototyping and Chip Design}, volume={Presentation}, journal={International Workshop on RISC-V Research Activities}, author={Adelt, Peer and Koppelmann, Bastian and Müller, Wolfgang}, year={2018} }","apa":"Adelt, P., Koppelmann, B., &#38; Müller, W. (2018). Current and Future RISC-V Activities for Virtual Prototyping and Chip Design. <i>International Workshop on RISC-V Research Activities</i>, <i>Presentation</i>.","mla":"Adelt, Peer, et al. “Current and Future RISC-V Activities for Virtual Prototyping and Chip Design.” <i>International Workshop on RISC-V Research Activities</i>, vol. Presentation, 2018.","ieee":"P. Adelt, B. Koppelmann, and W. Müller, “Current and Future RISC-V Activities for Virtual Prototyping and Chip Design,” <i>International Workshop on RISC-V Research Activities</i>, vol. Presentation, 2018."},"publication":"International Workshop on RISC-V Research Activities","department":[{"_id":"58"}],"type":"journal_article","date_created":"2021-09-13T07:38:01Z"}]