---
res:
  bibo_abstract:
  - ' This paper presents the acceleration of minimum-cost covering problems by instance-specific
    hardware. First, we formulate the minimum-cost covering problem and discuss a
    branch \& bound algorithm to solve it. Then we describe instance-specific hardware
    architectures that implement branch \& bound in 3-valued logic and use reduction
    techniques similar to those found in software solvers. We further present prototypical
    accelerator implementations and a corresponding design tool flow. Our experiments
    reveal significant raw speedups up to five orders of magnitude for a set of smaller
    unate covering problems. Provided that hardware compilation times can be reduced,
    we conclude that instance-specific acceleration of hard minimum-cost covering
    problems will lead to substantial overall speedups. @eng'
  bibo_authorlist:
  - foaf_Person:
      foaf_givenName: Christian
      foaf_name: Plessl, Christian
      foaf_surname: Plessl
      foaf_workInfoHomepage: http://www.librecat.org/personId=16153
    orcid: 0000-0001-5728-9982
  - foaf_Person:
      foaf_givenName: Marco
      foaf_name: Platzner, Marco
      foaf_surname: Platzner
      foaf_workInfoHomepage: http://www.librecat.org/personId=398
  bibo_doi: 10.1023/a:1024443416592
  bibo_issue: '2'
  bibo_volume: 26
  dct_date: 2003^xs_gYear
  dct_isPartOf:
  - http://id.crossref.org/issn/0920-8542
  dct_language: eng
  dct_publisher: Kluwer Academic Publishers@
  dct_subject:
  - reconfigurable computing
  - instance-specific acceleration
  - minimum covering
  dct_title: Instance-Specific Accelerators for Minimum Covering@
...