{"volume":2778,"_id":"2421","title":"Virtualizing Hardware with Multi-Context Reconfigurable Arrays","keyword":["Zippy","multi-context","FPGA"],"department":[{"_id":"518"},{"_id":"78"}],"date_created":"2018-04-17T15:11:25Z","user_id":"24135","citation":{"apa":"Enzler, R., Plessl, C., &#38; Platzner, M. (2003). Virtualizing Hardware with Multi-Context Reconfigurable Arrays. In <i>Proc. Int. Conf. on Field Programmable Logic and Applications (FPL)</i> (Vol. 2778, pp. 151–160). Springer. <a href=\"https://doi.org/10.1007/b12007\">https://doi.org/10.1007/b12007</a>","ieee":"R. Enzler, C. Plessl, and M. Platzner, “Virtualizing Hardware with Multi-Context Reconfigurable Arrays,” in <i>Proc. Int. Conf. on Field Programmable Logic and Applications (FPL)</i>, 2003, vol. 2778, pp. 151–160.","ama":"Enzler R, Plessl C, Platzner M. Virtualizing Hardware with Multi-Context Reconfigurable Arrays. In: <i>Proc. Int. Conf. on Field Programmable Logic and Applications (FPL)</i>. Vol 2778. Lecture Notes in Computer Science (LNCS). Springer; 2003:151-160. doi:<a href=\"https://doi.org/10.1007/b12007\">10.1007/b12007</a>","mla":"Enzler, Rolf, et al. “Virtualizing Hardware with Multi-Context Reconfigurable Arrays.” <i>Proc. Int. Conf. on Field Programmable Logic and Applications (FPL)</i>, vol. 2778, Springer, 2003, pp. 151–60, doi:<a href=\"https://doi.org/10.1007/b12007\">10.1007/b12007</a>.","chicago":"Enzler, Rolf, Christian Plessl, and Marco Platzner. “Virtualizing Hardware with Multi-Context Reconfigurable Arrays.” In <i>Proc. Int. Conf. on Field Programmable Logic and Applications (FPL)</i>, 2778:151–60. Lecture Notes in Computer Science (LNCS). Springer, 2003. <a href=\"https://doi.org/10.1007/b12007\">https://doi.org/10.1007/b12007</a>.","short":"R. Enzler, C. Plessl, M. Platzner, in: Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), Springer, 2003, pp. 151–160.","bibtex":"@inproceedings{Enzler_Plessl_Platzner_2003, series={Lecture Notes in Computer Science (LNCS)}, title={Virtualizing Hardware with Multi-Context Reconfigurable Arrays}, volume={2778}, DOI={<a href=\"https://doi.org/10.1007/b12007\">10.1007/b12007</a>}, booktitle={Proc. Int. Conf. on Field Programmable Logic and Applications (FPL)}, publisher={Springer}, author={Enzler, Rolf and Plessl, Christian and Platzner, Marco}, year={2003}, pages={151–160}, collection={Lecture Notes in Computer Science (LNCS)} }"},"year":"2003","status":"public","intvolume":"      2778","author":[{"last_name":"Enzler","full_name":"Enzler, Rolf","first_name":"Rolf"},{"orcid":"0000-0001-5728-9982","first_name":"Christian","last_name":"Plessl","id":"16153","full_name":"Plessl, Christian"},{"first_name":"Marco","id":"398","last_name":"Platzner","full_name":"Platzner, Marco"}],"abstract":[{"text":"In contrast to processors, current reconfigurable devices totally lack programming models that would allow for device independent compilation and forward compatibility. The key to overcome this limitation is hardware virtualization. In this paper, we resort to a macro-pipelined execution model to achieve hardware virtualization for data streaming applications. As a hardware implementation we present a hybrid multi-context architecture that attaches a coarse-grained reconfigurable array to a host CPU. A co-simulation framework enables cycle-accurate simulation of the complete architecture. As a case study we map an FIR filter to our virtualized hardware model and evaluate different designs. We discuss the impact of the number of contexts and the feature of context state on the speedup and the CPU load.","lang":"eng"}],"publisher":"Springer","doi":"10.1007/b12007","series_title":"Lecture Notes in Computer Science (LNCS)","date_updated":"2022-01-06T06:56:13Z","type":"conference","publication":"Proc. Int. Conf. on Field Programmable Logic and Applications (FPL)","page":"151-160"}