{"title":"Exploiting Hardware-Based Data-Parallel and Multithreading Models for Smart Edge Computing in Reconfigurable FPGAs","department":[{"_id":"78"}],"publication":"IEEE Transactions on Computers","date_updated":"2022-04-18T10:04:21Z","status":"public","date_created":"2022-04-18T10:03:16Z","user_id":"398","page":"1-1","publication_status":"published","type":"journal_article","publisher":"Institute of Electrical and Electronics Engineers (IEEE)","language":[{"iso":"eng"}],"doi":"10.1109/tc.2021.3107196","publication_identifier":{"issn":["0018-9340","1557-9956","2326-3814"]},"_id":"30907","citation":{"ama":"Rodriguez A, Otero A, Platzner M, De la Torre E. Exploiting Hardware-Based Data-Parallel and Multithreading Models for Smart Edge Computing in Reconfigurable FPGAs. IEEE Transactions on Computers. Published online 2021:1-1. doi:10.1109/tc.2021.3107196","chicago":"Rodriguez, Alfonso, Andres Otero, Marco Platzner, and Eduardo De la Torre. “Exploiting Hardware-Based Data-Parallel and Multithreading Models for Smart Edge Computing in Reconfigurable FPGAs.” IEEE Transactions on Computers, 2021, 1–1. https://doi.org/10.1109/tc.2021.3107196.","short":"A. Rodriguez, A. Otero, M. Platzner, E. De la Torre, IEEE Transactions on Computers (2021) 1–1.","ieee":"A. Rodriguez, A. Otero, M. Platzner, and E. De la Torre, “Exploiting Hardware-Based Data-Parallel and Multithreading Models for Smart Edge Computing in Reconfigurable FPGAs,” IEEE Transactions on Computers, pp. 1–1, 2021, doi: 10.1109/tc.2021.3107196.","apa":"Rodriguez, A., Otero, A., Platzner, M., & De la Torre, E. (2021). Exploiting Hardware-Based Data-Parallel and Multithreading Models for Smart Edge Computing in Reconfigurable FPGAs. IEEE Transactions on Computers, 1–1. https://doi.org/10.1109/tc.2021.3107196","bibtex":"@article{Rodriguez_Otero_Platzner_De la Torre_2021, title={Exploiting Hardware-Based Data-Parallel and Multithreading Models for Smart Edge Computing in Reconfigurable FPGAs}, DOI={10.1109/tc.2021.3107196}, journal={IEEE Transactions on Computers}, publisher={Institute of Electrical and Electronics Engineers (IEEE)}, author={Rodriguez, Alfonso and Otero, Andres and Platzner, Marco and De la Torre, Eduardo}, year={2021}, pages={1–1} }","mla":"Rodriguez, Alfonso, et al. “Exploiting Hardware-Based Data-Parallel and Multithreading Models for Smart Edge Computing in Reconfigurable FPGAs.” IEEE Transactions on Computers, Institute of Electrical and Electronics Engineers (IEEE), 2021, pp. 1–1, doi:10.1109/tc.2021.3107196."},"keyword":["Computational Theory and Mathematics","Hardware and Architecture","Theoretical Computer Science","Software"],"year":"2021","author":[{"last_name":"Rodriguez","full_name":"Rodriguez, Alfonso","first_name":"Alfonso"},{"last_name":"Otero","full_name":"Otero, Andres","first_name":"Andres"},{"id":"398","first_name":"Marco","last_name":"Platzner","full_name":"Platzner, Marco"},{"first_name":"Eduardo","last_name":"De la Torre","full_name":"De la Torre, Eduardo"}]}