{"date_created":"2022-11-03T14:42:16Z","project":[{"name":"PC2: Computing Resources Provided by the Paderborn Center for Parallel Computing","_id":"52"}],"abstract":[{"text":"Deep neural networks (DNNs) are penetrating into a broad spectrum of applications and replacing manual algorithmic implementations, including the radio frequency communications domain with classical signal processing algorithms. However, the high throughput (gigasamples per second) and low latency requirements of this application domain pose a significant hurdle for adopting computationally demanding DNNs. In this article, we explore highly specialized DNN inference accelerator approaches on field-programmable gate arrays (FPGAs) for RadioML modulation classification. Using an automated end-to-end flow for the generation of the FPGA solution, we can easily explore a spectrum of solutions that optimize for different design targets, including accuracy, power efficiency, resources, throughput, and latency. By leveraging reduced precision arithmetic and customized streaming dataflow, we demonstrate a solution that meets the application requirements and outperforms alternative FPGA efforts by 3.5x in terms of throughput. Against modern embedded graphics processing units (GPUs), we measure >10x higher throughput and >100x lower latency under comparable accuracy and power envelopes.","lang":"eng"}],"doi":"10.1109/MM.2022.3202091","page":"125-133","publication_status":"published","issue":"6","_id":"33990","title":"RadioML Meets FINN: Enabling Future RF Applications With FPGA Streaming Architectures","department":[{"_id":"78"}],"volume":42,"user_id":"55631","citation":{"ieee":"F. Jentzsch, Y. Umuroglu, A. Pappalardo, M. Blott, and M. Platzner, “RadioML Meets FINN: Enabling Future RF Applications With FPGA Streaming Architectures,” <i>IEEE Micro</i>, vol. 42, no. 6, pp. 125–133, 2022, doi: <a href=\"https://doi.org/10.1109/MM.2022.3202091\">10.1109/MM.2022.3202091</a>.","mla":"Jentzsch, Felix, et al. “RadioML Meets FINN: Enabling Future RF Applications With FPGA Streaming Architectures.” <i>IEEE Micro</i>, vol. 42, no. 6, IEEE, 2022, pp. 125–33, doi:<a href=\"https://doi.org/10.1109/MM.2022.3202091\">10.1109/MM.2022.3202091</a>.","ama":"Jentzsch F, Umuroglu Y, Pappalardo A, Blott M, Platzner M. RadioML Meets FINN: Enabling Future RF Applications With FPGA Streaming Architectures. <i>IEEE Micro</i>. 2022;42(6):125-133. doi:<a href=\"https://doi.org/10.1109/MM.2022.3202091\">10.1109/MM.2022.3202091</a>","apa":"Jentzsch, F., Umuroglu, Y., Pappalardo, A., Blott, M., &#38; Platzner, M. (2022). RadioML Meets FINN: Enabling Future RF Applications With FPGA Streaming Architectures. <i>IEEE Micro</i>, <i>42</i>(6), 125–133. <a href=\"https://doi.org/10.1109/MM.2022.3202091\">https://doi.org/10.1109/MM.2022.3202091</a>","bibtex":"@article{Jentzsch_Umuroglu_Pappalardo_Blott_Platzner_2022, title={RadioML Meets FINN: Enabling Future RF Applications With FPGA Streaming Architectures}, volume={42}, DOI={<a href=\"https://doi.org/10.1109/MM.2022.3202091\">10.1109/MM.2022.3202091</a>}, number={6}, journal={IEEE Micro}, publisher={IEEE}, author={Jentzsch, Felix and Umuroglu, Yaman and Pappalardo, Alessandro and Blott, Michaela and Platzner, Marco}, year={2022}, pages={125–133} }","chicago":"Jentzsch, Felix, Yaman Umuroglu, Alessandro Pappalardo, Michaela Blott, and Marco Platzner. “RadioML Meets FINN: Enabling Future RF Applications With FPGA Streaming Architectures.” <i>IEEE Micro</i> 42, no. 6 (2022): 125–33. <a href=\"https://doi.org/10.1109/MM.2022.3202091\">https://doi.org/10.1109/MM.2022.3202091</a>.","short":"F. Jentzsch, Y. Umuroglu, A. Pappalardo, M. Blott, M. Platzner, IEEE Micro 42 (2022) 125–133."},"status":"public","intvolume":"        42","year":"2022","publisher":"IEEE","author":[{"orcid":"0000-0003-4987-5708","first_name":"Felix","full_name":"Jentzsch, Felix","id":"55631","last_name":"Jentzsch"},{"last_name":"Umuroglu","full_name":"Umuroglu, Yaman","first_name":"Yaman"},{"first_name":"Alessandro","full_name":"Pappalardo, Alessandro","last_name":"Pappalardo"},{"first_name":"Michaela","full_name":"Blott, Michaela","last_name":"Blott"},{"full_name":"Platzner, Marco","last_name":"Platzner","id":"398","first_name":"Marco"}],"date_updated":"2023-04-04T15:09:17Z","type":"journal_article","publication":"IEEE Micro","language":[{"iso":"eng"}],"main_file_link":[{"url":"https://ieeexplore.ieee.org/document/9933377"}]}