{"publication":"Proceedings of the IEEE Computer Society Annual Symposium on VLSI","abstract":[{"text":"The main obstacle for the wide acceptance of UML and SysML in the design of electronic systems is due to a major gap in the design flow between UML-based modeling and SystemC-based verification. To overcome this gap, we present an approach developed in the SATURN project which introduces UML profiles for the co-modeling of SystemC and C with code generation support in the context of the SysML tool suite ARTiSAN Studio®. We finally discuss the evaluation of the approach by two case studies.","lang":"eng"}],"title":"The SATURN Approach to SysML-based HW/SW Codesign","date_updated":"2023-01-17T11:19:53Z","language":[{"iso":"eng"}],"series_title":"Lecture Notes in Electrical Engineering","department":[{"_id":"672"}],"keyword":["Communicate Sequential Process Virtual Platform Smart Camera Synchronous Data Flow Artisan Studio"],"type":"conference","citation":{"ama":"Müller W, He D, Mischkalla F, et al. The SATURN Approach to SysML-based HW/SW Codesign. In: Proceedings of the IEEE Computer Society Annual Symposium on VLSI. Lecture Notes in Electrical Engineering. ; 2010. doi:10.1007/978-94-007-1488-5_9","apa":"Müller, W., He, D., Mischkalla, F., Wegele, A., Larkham, A., Whiston, P., Penil, P., Villar, E., Mitas, N., Kritharidis, D., Azcarate, F., & Carballeda, M. (2010). The SATURN Approach to SysML-based HW/SW Codesign. Proceedings of the IEEE Computer Society Annual Symposium on VLSI. https://doi.org/10.1007/978-94-007-1488-5_9","ieee":"W. Müller et al., “The SATURN Approach to SysML-based HW/SW Codesign,” 2010, doi: 10.1007/978-94-007-1488-5_9.","bibtex":"@inproceedings{Müller_He_Mischkalla_Wegele_Larkham_Whiston_Penil_Villar_Mitas_Kritharidis_et al._2010, series={Lecture Notes in Electrical Engineering}, title={The SATURN Approach to SysML-based HW/SW Codesign}, DOI={10.1007/978-94-007-1488-5_9}, booktitle={Proceedings of the IEEE Computer Society Annual Symposium on VLSI}, author={Müller, Wolfgang and He, Da and Mischkalla, Fabian and Wegele, Arthur and Larkham, Adrian and Whiston, Paul and Penil, Pablo and Villar, Eugenio and Mitas, Nikolaos and Kritharidis, Dimitros and et al.}, year={2010}, collection={Lecture Notes in Electrical Engineering} }","chicago":"Müller, Wolfgang, Da He, Fabian Mischkalla, Arthur Wegele, Adrian Larkham, Paul Whiston, Pablo Penil, et al. “The SATURN Approach to SysML-Based HW/SW Codesign.” In Proceedings of the IEEE Computer Society Annual Symposium on VLSI. Lecture Notes in Electrical Engineering, 2010. https://doi.org/10.1007/978-94-007-1488-5_9.","short":"W. Müller, D. He, F. Mischkalla, A. Wegele, A. Larkham, P. Whiston, P. Penil, E. Villar, N. Mitas, D. Kritharidis, F. Azcarate, M. Carballeda, in: Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2010.","mla":"Müller, Wolfgang, et al. “The SATURN Approach to SysML-Based HW/SW Codesign.” Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2010, doi:10.1007/978-94-007-1488-5_9."},"year":"2010","author":[{"last_name":"Müller","full_name":"Müller, Wolfgang","first_name":"Wolfgang","id":"16243"},{"first_name":"Da","full_name":"He, Da","last_name":"He"},{"first_name":"Fabian","full_name":"Mischkalla, Fabian","last_name":"Mischkalla"},{"first_name":"Arthur","full_name":"Wegele, Arthur","last_name":"Wegele"},{"full_name":"Larkham, Adrian","last_name":"Larkham","first_name":"Adrian"},{"first_name":"Paul","full_name":"Whiston, Paul","last_name":"Whiston"},{"full_name":"Penil, Pablo","last_name":"Penil","first_name":"Pablo"},{"first_name":"Eugenio","last_name":"Villar","full_name":"Villar, Eugenio"},{"first_name":"Nikolaos","full_name":"Mitas, Nikolaos","last_name":"Mitas"},{"first_name":"Dimitros","full_name":"Kritharidis, Dimitros","last_name":"Kritharidis"},{"first_name":"Florent","last_name":"Azcarate","full_name":"Azcarate, Florent"},{"last_name":"Carballeda","full_name":"Carballeda, Manuel","first_name":"Manuel"}],"publication_identifier":{"eisbn":["978-94-007-1488-5"]},"user_id":"5786","doi":"10.1007/978-94-007-1488-5_9","date_created":"2023-01-17T11:19:45Z","_id":"37050","status":"public"}