{"series_title":"LNCS","publication":"Proceedings of the 10th International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications","type":"conference","date_updated":"2022-01-06T06:59:32Z","status":"public","year":"2014","author":[{"first_name":"Alexander","last_name":"Wold","full_name":"Wold, Alexander"},{"full_name":"Agne, Andreas","last_name":"Agne","first_name":"Andreas"},{"first_name":"Jim","last_name":"Torresen","full_name":"Torresen, Jim"}],"_id":"374","title":"Relocatable Hardware Threads in Run-Time Reconfigurable Systems","citation":{"bibtex":"@inproceedings{Wold_Agne_Torresen_2014, series={LNCS}, title={Relocatable Hardware Threads in Run-Time Reconfigurable Systems}, DOI={<a href=\"https://doi.org/10.1007/978-3-319-05960-0_6\">10.1007/978-3-319-05960-0_6</a>}, booktitle={Proceedings of the 10th International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications}, author={Wold, Alexander and Agne, Andreas and Torresen, Jim}, editor={Goehringer, Diana and Santambrogio, MarcoDomenico and Cardoso, JoãoM.P. and Bertels, KoenEditors}, year={2014}, pages={61–72}, collection={LNCS} }","mla":"Wold, Alexander, et al. “Relocatable Hardware Threads in Run-Time Reconfigurable Systems.” <i>Proceedings of the 10th International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications</i>, edited by Diana Goehringer et al., 2014, pp. 61–72, doi:<a href=\"https://doi.org/10.1007/978-3-319-05960-0_6\">10.1007/978-3-319-05960-0_6</a>.","ama":"Wold A, Agne A, Torresen J. Relocatable Hardware Threads in Run-Time Reconfigurable Systems. In: Goehringer D, Santambrogio M, Cardoso JP, Bertels K, eds. <i>Proceedings of the 10th International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications</i>. LNCS. ; 2014:61-72. doi:<a href=\"https://doi.org/10.1007/978-3-319-05960-0_6\">10.1007/978-3-319-05960-0_6</a>","ieee":"A. Wold, A. Agne, and J. Torresen, “Relocatable Hardware Threads in Run-Time Reconfigurable Systems,” in <i>Proceedings of the 10th International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications</i>, 2014, pp. 61–72.","short":"A. Wold, A. Agne, J. Torresen, in: D. Goehringer, M. Santambrogio, J.P. Cardoso, K. Bertels (Eds.), Proceedings of the 10th International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications, 2014, pp. 61–72.","apa":"Wold, A., Agne, A., &#38; Torresen, J. (2014). Relocatable Hardware Threads in Run-Time Reconfigurable Systems. In D. Goehringer, M. Santambrogio, J. P. Cardoso, &#38; K. Bertels (Eds.), <i>Proceedings of the 10th International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications</i> (pp. 61–72). <a href=\"https://doi.org/10.1007/978-3-319-05960-0_6\">https://doi.org/10.1007/978-3-319-05960-0_6</a>","chicago":"Wold, Alexander, Andreas Agne, and Jim Torresen. “Relocatable Hardware Threads in Run-Time Reconfigurable Systems.” In <i>Proceedings of the 10th International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications</i>, edited by Diana Goehringer, MarcoDomenico Santambrogio, JoãoM.P. Cardoso, and Koen Bertels, 61–72. LNCS, 2014. <a href=\"https://doi.org/10.1007/978-3-319-05960-0_6\">https://doi.org/10.1007/978-3-319-05960-0_6</a>."},"user_id":"15504","ddc":["040"],"doi":"10.1007/978-3-319-05960-0_6","file":[{"file_id":"1400","file_name":"374-2014_wold_arc.pdf","success":1,"date_created":"2018-03-20T07:15:59Z","date_updated":"2018-03-20T07:15:59Z","creator":"florida","file_size":818625,"content_type":"application/pdf","access_level":"closed","relation":"main_file"}],"page":"61-72","has_accepted_license":"1","project":[{"_id":"1","name":"SFB 901"},{"name":"SFB 901 - Subprojekt C2","_id":"14"},{"name":"SFB 901 - Project Area C","_id":"4"}],"abstract":[{"text":"Run-time reconfiguration provides an opportunity to increase performance, reduce cost and improve energy efficiency in FPGA-based systems. However, run-time reconfigurable systems are more complex to implement than static only systems. This increases time to market, and introduces run-time overhead into the system. Our research aims to raise the abstraction level to develop run-time reconfigurable systems. We present operating system extensions which enable seamless integration of run-time reconfigurable hardware threads into applications. To improve resource utilization, the hardware threads are placed on a fine granularity tile grid. We take advantage of a relocatable module placer targeting modern FPGA to manage the reconfigurable area. The module placer accurately models the FPGA resources to compute feasible placement locations for the hardware threads at run-time. Finally, we evaluate our work by means of a case study that consists of a synthetic application to validate the functionality and performance of the implementation. The results show a reduction in reconfiguration time of up to 42% and more than double resource utilization.","lang":"eng"}],"file_date_updated":"2018-03-20T07:15:59Z","editor":[{"first_name":"Diana","full_name":"Goehringer, Diana","last_name":"Goehringer"},{"first_name":"MarcoDomenico","full_name":"Santambrogio, MarcoDomenico","last_name":"Santambrogio"},{"last_name":"Cardoso","full_name":"Cardoso, JoãoM.P.","first_name":"JoãoM.P."},{"last_name":"Bertels","full_name":"Bertels, Koen","first_name":"Koen"}],"date_created":"2017-10-17T12:42:05Z"}