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<titleInfo><title>Relocatable Hardware Threads in Run-Time Reconfigurable Systems</title></titleInfo>





<name type="personal">
  <namePart type="given">Alexander</namePart>
  <namePart type="family">Wold</namePart>
  <role><roleTerm type="text">author</roleTerm> </role></name>
<name type="personal">
  <namePart type="given">Andreas</namePart>
  <namePart type="family">Agne</namePart>
  <role><roleTerm type="text">author</roleTerm> </role></name>
<name type="personal">
  <namePart type="given">Jim</namePart>
  <namePart type="family">Torresen</namePart>
  <role><roleTerm type="text">author</roleTerm> </role></name>



<name type="personal"><namePart type="given">Diana</namePart><namePart type="family">Goehringer</namePart>
  <role> <roleTerm type="text">editor</roleTerm> </role></name>
<name type="personal"><namePart type="given">MarcoDomenico</namePart><namePart type="family">Santambrogio</namePart>
  <role> <roleTerm type="text">editor</roleTerm> </role></name>
<name type="personal"><namePart type="given">JoãoM.P.</namePart><namePart type="family">Cardoso</namePart>
  <role> <roleTerm type="text">editor</roleTerm> </role></name>
<name type="personal"><namePart type="given">Koen</namePart><namePart type="family">Bertels</namePart>
  <role> <roleTerm type="text">editor</roleTerm> </role></name>








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  <namePart>SFB 901</namePart>
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<name type="corporate">
  <namePart>SFB 901 - Subprojekt C2</namePart>
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<name type="corporate">
  <namePart>SFB 901 - Project Area C</namePart>
  <role><roleTerm type="text">project</roleTerm></role>
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<abstract lang="eng">Run-time reconfiguration provides an opportunity to increase performance, reduce cost and improve energy efficiency in FPGA-based systems. However, run-time reconfigurable systems are more complex to implement than static only systems. This increases time to market, and introduces run-time overhead into the system. Our research aims to raise the abstraction level to develop run-time reconfigurable systems. We present operating system extensions which enable seamless integration of run-time reconfigurable hardware threads into applications. To improve resource utilization, the hardware threads are placed on a fine granularity tile grid. We take advantage of a relocatable module placer targeting modern FPGA to manage the reconfigurable area. The module placer accurately models the FPGA resources to compute feasible placement locations for the hardware threads at run-time. Finally, we evaluate our work by means of a case study that consists of a synthetic application to validate the functionality and performance of the implementation. The results show a reduction in reconfiguration time of up to 42% and more than double resource utilization.</abstract>

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<originInfo><dateIssued encoding="w3cdtf">2014</dateIssued>
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<relatedItem type="host"><titleInfo><title>Proceedings of the 10th International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications</title></titleInfo><identifier type="doi">10.1007/978-3-319-05960-0_6</identifier>
<part><extent unit="pages">61-72</extent>
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<apa>Wold, A., Agne, A., &amp;#38; Torresen, J. (2014). Relocatable Hardware Threads in Run-Time Reconfigurable Systems. In D. Goehringer, M. Santambrogio, J. P. Cardoso, &amp;#38; K. Bertels (Eds.), &lt;i&gt;Proceedings of the 10th International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications&lt;/i&gt; (pp. 61–72). &lt;a href=&quot;https://doi.org/10.1007/978-3-319-05960-0_6&quot;&gt;https://doi.org/10.1007/978-3-319-05960-0_6&lt;/a&gt;</apa>
<ieee>A. Wold, A. Agne, and J. Torresen, “Relocatable Hardware Threads in Run-Time Reconfigurable Systems,” in &lt;i&gt;Proceedings of the 10th International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications&lt;/i&gt;, 2014, pp. 61–72.</ieee>
<chicago>Wold, Alexander, Andreas Agne, and Jim Torresen. “Relocatable Hardware Threads in Run-Time Reconfigurable Systems.” In &lt;i&gt;Proceedings of the 10th International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications&lt;/i&gt;, edited by Diana Goehringer, MarcoDomenico Santambrogio, JoãoM.P. Cardoso, and Koen Bertels, 61–72. LNCS, 2014. &lt;a href=&quot;https://doi.org/10.1007/978-3-319-05960-0_6&quot;&gt;https://doi.org/10.1007/978-3-319-05960-0_6&lt;/a&gt;.</chicago>
<short>A. Wold, A. Agne, J. Torresen, in: D. Goehringer, M. Santambrogio, J.P. Cardoso, K. Bertels (Eds.), Proceedings of the 10th International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications, 2014, pp. 61–72.</short>
<mla>Wold, Alexander, et al. “Relocatable Hardware Threads in Run-Time Reconfigurable Systems.” &lt;i&gt;Proceedings of the 10th International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications&lt;/i&gt;, edited by Diana Goehringer et al., 2014, pp. 61–72, doi:&lt;a href=&quot;https://doi.org/10.1007/978-3-319-05960-0_6&quot;&gt;10.1007/978-3-319-05960-0_6&lt;/a&gt;.</mla>
<ama>Wold A, Agne A, Torresen J. Relocatable Hardware Threads in Run-Time Reconfigurable Systems. In: Goehringer D, Santambrogio M, Cardoso JP, Bertels K, eds. &lt;i&gt;Proceedings of the 10th International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications&lt;/i&gt;. LNCS. ; 2014:61-72. doi:&lt;a href=&quot;https://doi.org/10.1007/978-3-319-05960-0_6&quot;&gt;10.1007/978-3-319-05960-0_6&lt;/a&gt;</ama>
<bibtex>@inproceedings{Wold_Agne_Torresen_2014, series={LNCS}, title={Relocatable Hardware Threads in Run-Time Reconfigurable Systems}, DOI={&lt;a href=&quot;https://doi.org/10.1007/978-3-319-05960-0_6&quot;&gt;10.1007/978-3-319-05960-0_6&lt;/a&gt;}, booktitle={Proceedings of the 10th International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications}, author={Wold, Alexander and Agne, Andreas and Torresen, Jim}, editor={Goehringer, Diana and Santambrogio, MarcoDomenico and Cardoso, JoãoM.P. and Bertels, KoenEditors}, year={2014}, pages={61–72}, collection={LNCS} }</bibtex>
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