{"department":[{"_id":"27"},{"_id":"518"},{"_id":"78"}],"series_title":"Lecture Notes in Computer Science (LNCS)","doi":"10.1007/978-3-319-05960-0_13","project":[{"_id":"1","grant_number":"160364472","name":"SFB 901"},{"name":"SFB 901 - Subprojekt C2","grant_number":"160364472","_id":"14"},{"_id":"4","name":"SFB 901 - Project Area C"},{"name":"Self-Adaptive Virtualisation-Aware High-Performance/Low-Energy Heterogeneous System Architectures","grant_number":"610996","_id":"34"}],"has_accepted_license":"1","intvolume":" 8405","type":"conference","date_updated":"2023-09-26T13:34:08Z","language":[{"iso":"eng"}],"abstract":[{"text":"In order to leverage the use of reconfigurable architectures in general-purpose computing, quick and automated methods to find suitable accelerator designs are required. We tackle this challenge in both regards. In order to avoid long synthesis times, we target a vector copro- cessor, implemented on the FPGAs of a Convey HC-1. Previous studies showed that existing tools were not able to accelerate a real-world application with low effort. We present a toolflow to automatically identify suitable loops for vectorization, generate a corresponding hardware/software bipartition, and generate coprocessor code. Where applicable, we leverage outer-loop vectorization. We evaluate our tools with a set of characteristic loops, systematically analyzing different dependency and data layout properties.","lang":"eng"}],"citation":{"ama":"Kenter T, Vaz GF, Plessl C. Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer. In: Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC). Vol 8405. Lecture Notes in Computer Science (LNCS). Springer International Publishing; 2014:144-155. doi:10.1007/978-3-319-05960-0_13","apa":"Kenter, T., Vaz, G. F., & Plessl, C. (2014). Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer. Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC), 8405, 144–155. https://doi.org/10.1007/978-3-319-05960-0_13","ieee":"T. Kenter, G. F. Vaz, and C. Plessl, “Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer,” in Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC), 2014, vol. 8405, pp. 144–155, doi: 10.1007/978-3-319-05960-0_13.","short":"T. Kenter, G.F. Vaz, C. Plessl, in: Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC), Springer International Publishing, Cham, 2014, pp. 144–155.","mla":"Kenter, Tobias, et al. “Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer.” Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC), vol. 8405, Springer International Publishing, 2014, pp. 144–55, doi:10.1007/978-3-319-05960-0_13.","chicago":"Kenter, Tobias, Gavin Francis Vaz, and Christian Plessl. “Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer.” In Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC), 8405:144–55. Lecture Notes in Computer Science (LNCS). Cham: Springer International Publishing, 2014. https://doi.org/10.1007/978-3-319-05960-0_13.","bibtex":"@inproceedings{Kenter_Vaz_Plessl_2014, place={Cham}, series={Lecture Notes in Computer Science (LNCS)}, title={Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer}, volume={8405}, DOI={10.1007/978-3-319-05960-0_13}, booktitle={Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC)}, publisher={Springer International Publishing}, author={Kenter, Tobias and Vaz, Gavin Francis and Plessl, Christian}, year={2014}, pages={144–155}, collection={Lecture Notes in Computer Science (LNCS)} }"},"place":"Cham","year":"2014","_id":"388","publication":"Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC)","date_created":"2017-10-17T12:42:07Z","file_date_updated":"2018-03-20T07:02:02Z","quality_controlled":"1","volume":8405,"status":"public","author":[{"id":"3145","last_name":"Kenter","first_name":"Tobias","full_name":"Kenter, Tobias"},{"first_name":"Gavin Francis","last_name":"Vaz","id":"30332","full_name":"Vaz, Gavin Francis"},{"full_name":"Plessl, Christian","orcid":"0000-0001-5728-9982","last_name":"Plessl","first_name":"Christian","id":"16153"}],"page":"144-155","user_id":"15278","title":"Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer","file":[{"file_size":330193,"date_updated":"2018-03-20T07:02:02Z","success":1,"file_id":"1387","content_type":"application/pdf","file_name":"388-plessl14_arc.pdf","date_created":"2018-03-20T07:02:02Z","creator":"florida","relation":"main_file","access_level":"closed"}],"publisher":"Springer International Publishing","ddc":["040"]}