{"doi":"10.1109/ReConFig.2014.7032509","department":[{"_id":"27"},{"_id":"518"},{"_id":"78"}],"has_accepted_license":"1","project":[{"_id":"1","grant_number":"160364472","name":"SFB 901"},{"grant_number":"160364472","name":"SFB 901 - Subprojekt C2","_id":"14"},{"_id":"4","name":"SFB 901 - Project Area C"},{"name":"Self-Adaptive Virtualisation-Aware High-Performance/Low-Energy Heterogeneous System Architectures","grant_number":"610996","_id":"34"}],"date_updated":"2023-09-26T13:37:02Z","type":"conference","date_created":"2017-10-17T12:42:17Z","publication":"Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig)","year":"2014","_id":"439","language":[{"iso":"eng"}],"abstract":[{"lang":"eng","text":"Reconfigurable architectures provide an opportunityto accelerate a wide range of applications, frequentlyby exploiting data-parallelism, where the same operations arehomogeneously executed on a (large) set of data. However, whenthe sequential code is executed on a host CPU and only dataparallelloops are executed on an FPGA coprocessor, a sufficientlylarge number of loop iterations (trip counts) is required, such thatthe control- and data-transfer overheads to the coprocessor canbe amortized. However, the trip count of large data-parallel loopsis frequently not known at compile time, but only at runtime justbefore entering a loop. Therefore, we propose to generate codeboth for the CPU and the coprocessor, and to defer the decisionwhere to execute the appropriate code to the runtime of theapplication when the trip count of the loop can be determinedjust at runtime. We demonstrate how an LLVM compiler basedtoolflow can automatically insert appropriate decision blocks intothe application code. Analyzing popular benchmark suites, weshow that this kind of runtime decisions is often applicable. Thepractical feasibility of our approach is demonstrated by a toolflowthat automatically identifies loops suitable for vectorization andgenerates code for the FPGA coprocessor of a Convey HC-1. Thetoolflow adds decisions based on a comparison of the runtimecomputedtrip counts to thresholds for specific loops and alsoincludes support to move just the required data to the coprocessor.We evaluate the integrated toolflow with characteristic loopsexecuted on different input data sizes."}],"citation":{"short":"G.F. Vaz, H. Riebler, T. Kenter, C. Plessl, in: Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2014, pp. 1–8.","ieee":"G. F. Vaz, H. Riebler, T. Kenter, and C. Plessl, “Deferring Accelerator Offloading Decisions to Application Runtime,” in <i>Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig)</i>, 2014, pp. 1–8, doi: <a href=\"https://doi.org/10.1109/ReConFig.2014.7032509\">10.1109/ReConFig.2014.7032509</a>.","chicago":"Vaz, Gavin Francis, Heinrich Riebler, Tobias Kenter, and Christian Plessl. “Deferring Accelerator Offloading Decisions to Application Runtime.” In <i>Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig)</i>, 1–8. IEEE, 2014. <a href=\"https://doi.org/10.1109/ReConFig.2014.7032509\">https://doi.org/10.1109/ReConFig.2014.7032509</a>.","mla":"Vaz, Gavin Francis, et al. “Deferring Accelerator Offloading Decisions to Application Runtime.” <i>Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig)</i>, IEEE, 2014, pp. 1–8, doi:<a href=\"https://doi.org/10.1109/ReConFig.2014.7032509\">10.1109/ReConFig.2014.7032509</a>.","apa":"Vaz, G. F., Riebler, H., Kenter, T., &#38; Plessl, C. (2014). Deferring Accelerator Offloading Decisions to Application Runtime. <i>Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig)</i>, 1–8. <a href=\"https://doi.org/10.1109/ReConFig.2014.7032509\">https://doi.org/10.1109/ReConFig.2014.7032509</a>","ama":"Vaz GF, Riebler H, Kenter T, Plessl C. Deferring Accelerator Offloading Decisions to Application Runtime. In: <i>Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig)</i>. IEEE; 2014:1-8. doi:<a href=\"https://doi.org/10.1109/ReConFig.2014.7032509\">10.1109/ReConFig.2014.7032509</a>","bibtex":"@inproceedings{Vaz_Riebler_Kenter_Plessl_2014, title={Deferring Accelerator Offloading Decisions to Application Runtime}, DOI={<a href=\"https://doi.org/10.1109/ReConFig.2014.7032509\">10.1109/ReConFig.2014.7032509</a>}, booktitle={Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig)}, publisher={IEEE}, author={Vaz, Gavin Francis and Riebler, Heinrich and Kenter, Tobias and Plessl, Christian}, year={2014}, pages={1–8} }"},"file_date_updated":"2018-03-16T11:29:52Z","quality_controlled":"1","title":"Deferring Accelerator Offloading Decisions to Application Runtime","user_id":"15278","page":"1-8","status":"public","author":[{"id":"30332","last_name":"Vaz","first_name":"Gavin Francis","full_name":"Vaz, Gavin Francis"},{"id":"8961","last_name":"Riebler","first_name":"Heinrich","full_name":"Riebler, Heinrich"},{"full_name":"Kenter, Tobias","first_name":"Tobias","last_name":"Kenter","id":"3145"},{"last_name":"Plessl","first_name":"Christian","id":"16153","orcid":"0000-0001-5728-9982","full_name":"Plessl, Christian"}],"publisher":"IEEE","ddc":["040"],"file":[{"content_type":"application/pdf","file_name":"439-plessl14a_reconfig.pdf","creator":"florida","relation":"main_file","date_created":"2018-03-16T11:29:52Z","access_level":"closed","file_size":557362,"date_updated":"2018-03-16T11:29:52Z","success":1,"file_id":"1353"}]}