{"title":"Tuning Stochastic Space Compaction to Faster-than-at-Speed Test","_id":"4575","department":[{"_id":"48"}],"publication_identifier":{"isbn":["9781538657546"]},"user_id":"209","citation":{"short":"A. Sprenger, S. Hellebrand, in: 2018 IEEE 21st International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), IEEE, Budapest, Hungary, 2018.","chicago":"Sprenger, Alexander, and Sybille Hellebrand. “Tuning Stochastic Space Compaction to Faster-than-at-Speed Test.” In 2018 IEEE 21st International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS). Budapest, Hungary: IEEE, 2018. https://doi.org/10.1109/ddecs.2018.00020.","bibtex":"@inproceedings{Sprenger_Hellebrand_2018, place={Budapest, Hungary}, title={Tuning Stochastic Space Compaction to Faster-than-at-Speed Test}, DOI={10.1109/ddecs.2018.00020}, booktitle={2018 IEEE 21st International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)}, publisher={IEEE}, author={Sprenger, Alexander and Hellebrand, Sybille}, year={2018} }","apa":"Sprenger, A., & Hellebrand, S. (2018). Tuning Stochastic Space Compaction to Faster-than-at-Speed Test. 2018 IEEE 21st International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS). https://doi.org/10.1109/ddecs.2018.00020","ieee":"A. Sprenger and S. Hellebrand, “Tuning Stochastic Space Compaction to Faster-than-at-Speed Test,” 2018, doi: 10.1109/ddecs.2018.00020.","mla":"Sprenger, Alexander, and Sybille Hellebrand. “Tuning Stochastic Space Compaction to Faster-than-at-Speed Test.” 2018 IEEE 21st International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), IEEE, 2018, doi:10.1109/ddecs.2018.00020.","ama":"Sprenger A, Hellebrand S. Tuning Stochastic Space Compaction to Faster-than-at-Speed Test. In: 2018 IEEE 21st International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS). IEEE; 2018. doi:10.1109/ddecs.2018.00020"},"date_created":"2018-10-02T12:18:46Z","status":"public","project":[{"name":"Computing Resources Provided by the Paderborn Center for Parallel Computing","_id":"52"}],"year":"2018","place":"Budapest, Hungary","publisher":"IEEE","author":[{"first_name":"Alexander","last_name":"Sprenger","id":"22707","full_name":"Sprenger, Alexander"},{"first_name":"Sybille","orcid":"0000-0002-3717-3939","full_name":"Hellebrand, Sybille","last_name":"Hellebrand","id":"209"}],"doi":"10.1109/ddecs.2018.00020","type":"conference","date_updated":"2022-05-11T17:10:37Z","publication":"2018 IEEE 21st International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)","language":[{"iso":"eng"}],"publication_status":"published"}