{"type":"conference","doi":"10.1109/ddecs.2018.00020","project":[{"name":"Computing Resources Provided by the Paderborn Center for Parallel Computing","_id":"52"}],"status":"public","date_created":"2018-10-02T12:18:46Z","publication_status":"published","date_updated":"2022-05-11T17:10:37Z","publication_identifier":{"isbn":["9781538657546"]},"citation":{"apa":"Sprenger, A., &#38; Hellebrand, S. (2018). Tuning Stochastic Space Compaction to Faster-than-at-Speed Test. <i>2018 IEEE 21st International Symposium on Design and Diagnostics of Electronic Circuits &#38; Systems (DDECS)</i>. <a href=\"https://doi.org/10.1109/ddecs.2018.00020\">https://doi.org/10.1109/ddecs.2018.00020</a>","mla":"Sprenger, Alexander, and Sybille Hellebrand. “Tuning Stochastic Space Compaction to Faster-than-at-Speed Test.” <i>2018 IEEE 21st International Symposium on Design and Diagnostics of Electronic Circuits &#38; Systems (DDECS)</i>, IEEE, 2018, doi:<a href=\"https://doi.org/10.1109/ddecs.2018.00020\">10.1109/ddecs.2018.00020</a>.","ieee":"A. Sprenger and S. Hellebrand, “Tuning Stochastic Space Compaction to Faster-than-at-Speed Test,” 2018, doi: <a href=\"https://doi.org/10.1109/ddecs.2018.00020\">10.1109/ddecs.2018.00020</a>.","bibtex":"@inproceedings{Sprenger_Hellebrand_2018, place={Budapest, Hungary}, title={Tuning Stochastic Space Compaction to Faster-than-at-Speed Test}, DOI={<a href=\"https://doi.org/10.1109/ddecs.2018.00020\">10.1109/ddecs.2018.00020</a>}, booktitle={2018 IEEE 21st International Symposium on Design and Diagnostics of Electronic Circuits &#38; Systems (DDECS)}, publisher={IEEE}, author={Sprenger, Alexander and Hellebrand, Sybille}, year={2018} }","ama":"Sprenger A, Hellebrand S. Tuning Stochastic Space Compaction to Faster-than-at-Speed Test. In: <i>2018 IEEE 21st International Symposium on Design and Diagnostics of Electronic Circuits &#38; Systems (DDECS)</i>. IEEE; 2018. doi:<a href=\"https://doi.org/10.1109/ddecs.2018.00020\">10.1109/ddecs.2018.00020</a>","short":"A. Sprenger, S. Hellebrand, in: 2018 IEEE 21st International Symposium on Design and Diagnostics of Electronic Circuits &#38; Systems (DDECS), IEEE, Budapest, Hungary, 2018.","chicago":"Sprenger, Alexander, and Sybille Hellebrand. “Tuning Stochastic Space Compaction to Faster-than-at-Speed Test.” In <i>2018 IEEE 21st International Symposium on Design and Diagnostics of Electronic Circuits &#38; Systems (DDECS)</i>. Budapest, Hungary: IEEE, 2018. <a href=\"https://doi.org/10.1109/ddecs.2018.00020\">https://doi.org/10.1109/ddecs.2018.00020</a>."},"publisher":"IEEE","_id":"4575","language":[{"iso":"eng"}],"publication":"2018 IEEE 21st International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)","year":"2018","author":[{"last_name":"Sprenger","full_name":"Sprenger, Alexander","id":"22707","first_name":"Alexander"},{"orcid":"0000-0002-3717-3939","full_name":"Hellebrand, Sybille","last_name":"Hellebrand","first_name":"Sybille","id":"209"}],"title":"Tuning Stochastic Space Compaction to Faster-than-at-Speed Test","place":"Budapest, Hungary","department":[{"_id":"48"}],"user_id":"209"}