{"_id":"54241","language":[{"iso":"eng"}],"publisher":"Paderborn University","user_id":"55631","year":"2023","title":"Development of a Power Analysis Framework for Embedded FPGA Accelerators","status":"public","author":[{"last_name":"Reuter","first_name":"Lucas David","full_name":"Reuter, Lucas David"}],"date_updated":"2026-04-27T14:21:10Z","date_created":"2024-05-13T13:56:45Z","type":"bachelorsthesis","department":[{"_id":"78"}],"supervisor":[{"first_name":"Felix","orcid":"0000-0003-4987-5708","last_name":"Jentzsch","full_name":"Jentzsch, Felix","id":"55631"},{"last_name":"Platzner","first_name":"Marco","full_name":"Platzner, Marco","id":"398"}],"citation":{"ieee":"L. D. Reuter, <i>Development of a Power Analysis Framework for Embedded FPGA Accelerators</i>. Paderborn University, 2023.","apa":"Reuter, L. D. (2023). <i>Development of a Power Analysis Framework for Embedded FPGA Accelerators</i>. Paderborn University.","chicago":"Reuter, Lucas David. <i>Development of a Power Analysis Framework for Embedded FPGA Accelerators</i>. Paderborn University, 2023.","short":"L.D. Reuter, Development of a Power Analysis Framework for Embedded FPGA Accelerators, Paderborn University, 2023.","mla":"Reuter, Lucas David. <i>Development of a Power Analysis Framework for Embedded FPGA Accelerators</i>. Paderborn University, 2023.","bibtex":"@book{Reuter_2023, title={Development of a Power Analysis Framework for Embedded FPGA Accelerators}, publisher={Paderborn University}, author={Reuter, Lucas David}, year={2023} }","ama":"Reuter LD. <i>Development of a Power Analysis Framework for Embedded FPGA Accelerators</i>. Paderborn University; 2023."},"project":[{"_id":"52","name":"Computing Resources Provided by the Paderborn Center for Parallel Computing"}]}