{"publisher":"IEEE","quality_controlled":"1","type":"conference","publication_status":"published","user_id":"3145","date_created":"2024-10-14T07:49:24Z","status":"public","publication":"2024 34th International Conference on Field-Programmable Logic and Applications (FPL)","project":[{"name":"PC2: Computing Resources Provided by the Paderborn Center for Parallel Computing","_id":"52"}],"date_updated":"2024-10-14T07:56:26Z","department":[{"_id":"27"},{"_id":"518"}],"title":"StencilStream: A SYCL-based Stencil Simulation Framework Targeting FPGAs","author":[{"orcid":"0000-0003-2314-2784","first_name":"Jan-Oliver","last_name":"Opdenhövel","full_name":"Opdenhövel, Jan-Oliver","id":"73960"},{"last_name":"Alt","full_name":"Alt, Christoph","first_name":"Christoph","id":"100625"},{"id":"16153","full_name":"Plessl, Christian","last_name":"Plessl","first_name":"Christian","orcid":"0000-0001-5728-9982"},{"last_name":"Kenter","full_name":"Kenter, Tobias","first_name":"Tobias","id":"3145"}],"year":"2024","citation":{"chicago":"Opdenhövel, Jan-Oliver, Christoph Alt, Christian Plessl, and Tobias Kenter. “StencilStream: A SYCL-Based Stencil Simulation Framework Targeting FPGAs.” In <i>2024 34th International Conference on Field-Programmable Logic and Applications (FPL)</i>. IEEE, 2024. <a href=\"https://doi.org/10.1109/fpl64840.2024.00023\">https://doi.org/10.1109/fpl64840.2024.00023</a>.","ama":"Opdenhövel J-O, Alt C, Plessl C, Kenter T. StencilStream: A SYCL-based Stencil Simulation Framework Targeting FPGAs. In: <i>2024 34th International Conference on Field-Programmable Logic and Applications (FPL)</i>. IEEE; 2024. doi:<a href=\"https://doi.org/10.1109/fpl64840.2024.00023\">10.1109/fpl64840.2024.00023</a>","short":"J.-O. Opdenhövel, C. Alt, C. Plessl, T. Kenter, in: 2024 34th International Conference on Field-Programmable Logic and Applications (FPL), IEEE, 2024.","ieee":"J.-O. Opdenhövel, C. Alt, C. Plessl, and T. Kenter, “StencilStream: A SYCL-based Stencil Simulation Framework Targeting FPGAs,” 2024, doi: <a href=\"https://doi.org/10.1109/fpl64840.2024.00023\">10.1109/fpl64840.2024.00023</a>.","apa":"Opdenhövel, J.-O., Alt, C., Plessl, C., &#38; Kenter, T. (2024). StencilStream: A SYCL-based Stencil Simulation Framework Targeting FPGAs. <i>2024 34th International Conference on Field-Programmable Logic and Applications (FPL)</i>. <a href=\"https://doi.org/10.1109/fpl64840.2024.00023\">https://doi.org/10.1109/fpl64840.2024.00023</a>","bibtex":"@inproceedings{Opdenhövel_Alt_Plessl_Kenter_2024, title={StencilStream: A SYCL-based Stencil Simulation Framework Targeting FPGAs}, DOI={<a href=\"https://doi.org/10.1109/fpl64840.2024.00023\">10.1109/fpl64840.2024.00023</a>}, booktitle={2024 34th International Conference on Field-Programmable Logic and Applications (FPL)}, publisher={IEEE}, author={Opdenhövel, Jan-Oliver and Alt, Christoph and Plessl, Christian and Kenter, Tobias}, year={2024} }","mla":"Opdenhövel, Jan-Oliver, et al. “StencilStream: A SYCL-Based Stencil Simulation Framework Targeting FPGAs.” <i>2024 34th International Conference on Field-Programmable Logic and Applications (FPL)</i>, IEEE, 2024, doi:<a href=\"https://doi.org/10.1109/fpl64840.2024.00023\">10.1109/fpl64840.2024.00023</a>."},"_id":"56605","doi":"10.1109/fpl64840.2024.00023","language":[{"iso":"eng"}]}