{"language":[{"iso":"eng"}],"doi":"10.1109/fccm60383.2024.00014","_id":"56607","citation":{"ama":"Tareen AR, Meyer M, Plessl C, Kenter T. HiHiSpMV: Sparse Matrix Vector Multiplication with Hierarchical Row Reductions on FPGAs with High Bandwidth Memory. In: 2024 IEEE 32nd Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM). Vol 35. IEEE; 2024. doi:10.1109/fccm60383.2024.00014","chicago":"Tareen, Abdul Rehman, Marius Meyer, Christian Plessl, and Tobias Kenter. “HiHiSpMV: Sparse Matrix Vector Multiplication with Hierarchical Row Reductions on FPGAs with High Bandwidth Memory.” In 2024 IEEE 32nd Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), Vol. 35. IEEE, 2024. https://doi.org/10.1109/fccm60383.2024.00014.","ieee":"A. R. Tareen, M. Meyer, C. Plessl, and T. Kenter, “HiHiSpMV: Sparse Matrix Vector Multiplication with Hierarchical Row Reductions on FPGAs with High Bandwidth Memory,” in 2024 IEEE 32nd Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), 2024, vol. 35, doi: 10.1109/fccm60383.2024.00014.","apa":"Tareen, A. R., Meyer, M., Plessl, C., & Kenter, T. (2024). HiHiSpMV: Sparse Matrix Vector Multiplication with Hierarchical Row Reductions on FPGAs with High Bandwidth Memory. 2024 IEEE 32nd Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), 35. https://doi.org/10.1109/fccm60383.2024.00014","bibtex":"@inproceedings{Tareen_Meyer_Plessl_Kenter_2024, title={HiHiSpMV: Sparse Matrix Vector Multiplication with Hierarchical Row Reductions on FPGAs with High Bandwidth Memory}, volume={35}, DOI={10.1109/fccm60383.2024.00014}, booktitle={2024 IEEE 32nd Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)}, publisher={IEEE}, author={Tareen, Abdul Rehman and Meyer, Marius and Plessl, Christian and Kenter, Tobias}, year={2024} }","mla":"Tareen, Abdul Rehman, et al. “HiHiSpMV: Sparse Matrix Vector Multiplication with Hierarchical Row Reductions on FPGAs with High Bandwidth Memory.” 2024 IEEE 32nd Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), vol. 35, IEEE, 2024, doi:10.1109/fccm60383.2024.00014.","short":"A.R. Tareen, M. Meyer, C. Plessl, T. Kenter, in: 2024 IEEE 32nd Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), IEEE, 2024."},"year":"2024","author":[{"full_name":"Tareen, Abdul Rehman","last_name":"Tareen","first_name":"Abdul Rehman","id":"76938"},{"id":"40778","full_name":"Meyer, Marius","last_name":"Meyer","first_name":"Marius"},{"orcid":"0000-0001-5728-9982","id":"16153","first_name":"Christian","last_name":"Plessl","full_name":"Plessl, Christian"},{"id":"3145","first_name":"Tobias","full_name":"Kenter, Tobias","last_name":"Kenter"}],"title":"HiHiSpMV: Sparse Matrix Vector Multiplication with Hierarchical Row Reductions on FPGAs with High Bandwidth Memory","department":[{"_id":"27"},{"_id":"518"}],"date_updated":"2024-10-14T12:27:55Z","publication":"2024 IEEE 32nd Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)","status":"public","date_created":"2024-10-14T07:59:08Z","intvolume":" 35","user_id":"3145","type":"conference","publication_status":"published","quality_controlled":"1","publisher":"IEEE","volume":35}