{"language":[{"iso":"eng"}],"_id":"59816","title":"AuroraFlow, an Easy-to-Use, Low-Latency FPGA Communication Solution Demonstrated on Multi-FPGA Neural Network Inference","conference":{"start_date":"2025-05-26","name":"The International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies 2025 (HEART 2025) ","location":"Kumamoto, Japan","end_date":"2025-05-28"},"project":[{"name":"EKI-App: EKI-App: Energieeffiziente Künstliche Intelligenz im Rechenzentrum durch Approximation von tiefen neuronalen Netzen für Field-Programmable Gate Arrays","_id":"296"}],"citation":{"ama":"Pape G, Wintermann B, Jungemann L, et al. AuroraFlow, an Easy-to-Use, Low-Latency FPGA Communication Solution Demonstrated on Multi-FPGA Neural Network Inference. In: Proceedings of the 15th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies.","mla":"Pape, Gerrit, et al. “AuroraFlow, an Easy-to-Use, Low-Latency FPGA Communication Solution Demonstrated on Multi-FPGA Neural Network Inference.” Proceedings of the 15th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies.","bibtex":"@inproceedings{Pape_Wintermann_Jungemann_Lass_Meyer_Riebler_Plessl, title={AuroraFlow, an Easy-to-Use, Low-Latency FPGA Communication Solution Demonstrated on Multi-FPGA Neural Network Inference}, booktitle={Proceedings of the 15th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies}, author={Pape, Gerrit and Wintermann, Bjarne and Jungemann, Linus and Lass, Michael and Meyer, Marius and Riebler, Heinrich and Plessl, Christian} }","apa":"Pape, G., Wintermann, B., Jungemann, L., Lass, M., Meyer, M., Riebler, H., & Plessl, C. (n.d.). AuroraFlow, an Easy-to-Use, Low-Latency FPGA Communication Solution Demonstrated on Multi-FPGA Neural Network Inference. Proceedings of the 15th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies. The International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies 2025 (HEART 2025) , Kumamoto, Japan.","chicago":"Pape, Gerrit, Bjarne Wintermann, Linus Jungemann, Michael Lass, Marius Meyer, Heinrich Riebler, and Christian Plessl. “AuroraFlow, an Easy-to-Use, Low-Latency FPGA Communication Solution Demonstrated on Multi-FPGA Neural Network Inference.” In Proceedings of the 15th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, n.d.","short":"G. Pape, B. Wintermann, L. Jungemann, M. Lass, M. Meyer, H. Riebler, C. Plessl, in: Proceedings of the 15th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, n.d.","ieee":"G. Pape et al., “AuroraFlow, an Easy-to-Use, Low-Latency FPGA Communication Solution Demonstrated on Multi-FPGA Neural Network Inference,” presented at the The International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies 2025 (HEART 2025) , Kumamoto, Japan."},"type":"conference","publication":"Proceedings of the 15th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies","date_updated":"2025-05-06T09:58:59Z","department":[{"_id":"27"}],"author":[{"first_name":"Gerrit","full_name":"Pape, Gerrit","last_name":"Pape"},{"id":"62900","first_name":"Bjarne","last_name":"Wintermann","full_name":"Wintermann, Bjarne","orcid":"0009-0000-0856-6250"},{"full_name":"Jungemann, Linus","last_name":"Jungemann","orcid":"0009-0003-9757-988X","id":"67601","first_name":"Linus"},{"full_name":"Lass, Michael","last_name":"Lass","first_name":"Michael"},{"full_name":"Meyer, Marius","last_name":"Meyer","first_name":"Marius"},{"first_name":"Heinrich","id":"8961","full_name":"Riebler, Heinrich","last_name":"Riebler"},{"id":"16153","first_name":"Christian","last_name":"Plessl","full_name":"Plessl, Christian","orcid":"0000-0001-5728-9982"}],"year":"2025","user_id":"62900","publication_status":"accepted","date_created":"2025-05-06T09:53:41Z","status":"public"}