---
res:
  bibo_abstract:
  - While neural network quantization effectively reduces the cost of matrix multiplications,
    aggressive quantization can expose non-matrix-multiply operations as significant
    performance and resource bottlenecks on embedded systems. Addressing such bottlenecks
    requires a comprehensive approach to tailoring the precision across operations
    in the inference computation. To this end, we introduce scaled-integer range analysis
    (SIRA), a static analysis technique employing interval arithmetic to determine
    the range, scale, and bias for tensors in quantized neural networks. We show how
    this information can be exploited to reduce the resource footprint of FPGA dataflow
    neural network accelerators via tailored bitwidth adaptation for accumulators
    and downstream operations, aggregation of scales and biases, and conversion of
    consecutive elementwise operations to thresholding operations. We integrate SIRA-driven
    optimizations into the open-source FINN framework, then evaluate their effectiveness
    across a range of quantized neural network workloads and compare implementation
    alternatives for non-matrix-multiply operations. We demonstrate an average reduction
    of 17\% for LUTs, 66\% for DSPs, and 22\% for accumulator bitwidths with SIRA
    optimizations, providing detailed benchmark analysis and analytical models to
    guide the implementation style for non-matrix layers. Finally, we open-source
    SIRA to facilitate community exploration of its benefits across various applications
    and hardware platforms.@eng
  bibo_authorlist:
  - foaf_Person:
      foaf_givenName: Yaman
      foaf_name: Umuroglu, Yaman
      foaf_surname: Umuroglu
  - foaf_Person:
      foaf_givenName: Christoph
      foaf_name: Berganski, Christoph
      foaf_surname: Berganski
      foaf_workInfoHomepage: http://www.librecat.org/personId=98854
  - foaf_Person:
      foaf_givenName: Felix
      foaf_name: Jentzsch, Felix
      foaf_surname: Jentzsch
      foaf_workInfoHomepage: http://www.librecat.org/personId=55631
    orcid: 0000-0003-4987-5708
  - foaf_Person:
      foaf_givenName: Michal
      foaf_name: Danilowicz, Michal
      foaf_surname: Danilowicz
  - foaf_Person:
      foaf_givenName: Tomasz
      foaf_name: Kryjak, Tomasz
      foaf_surname: Kryjak
  - foaf_Person:
      foaf_givenName: Charalampos
      foaf_name: Bezaitis, Charalampos
      foaf_surname: Bezaitis
  - foaf_Person:
      foaf_givenName: Magnus
      foaf_name: Sjalander, Magnus
      foaf_surname: Sjalander
  - foaf_Person:
      foaf_givenName: Ian
      foaf_name: Colbert, Ian
      foaf_surname: Colbert
  - foaf_Person:
      foaf_givenName: Thomas
      foaf_name: Preusser, Thomas
      foaf_surname: Preusser
  - foaf_Person:
      foaf_givenName: Jakoba
      foaf_name: Petri-Koenig, Jakoba
      foaf_surname: Petri-Koenig
  - foaf_Person:
      foaf_givenName: Michaela
      foaf_name: Blott, Michaela
      foaf_surname: Blott
  bibo_doi: 10.1145/3807510
  dct_date: 2026^xs_gYear
  dct_isPartOf:
  - http://id.crossref.org/issn/1936-7406
  dct_language: eng
  dct_title: 'SIRA: Scaled-Integer Range Analysis for Optimizing FPGA Dataflow Neural
    Network Accelerators@'
...