A Two-Stage Approximation Methodology for Efficient DNN Hardware Implementation Hadipour, Amir Hossein Jafari, Atousa Awais, Muhammad Platzner, Marco IEEE 2025 info:eu-repo/semantics/conferenceObject doc-type:conferenceObject text http://purl.org/coar/resource_type/c_5794 https://ris.uni-paderborn.de/record/62019 Hadipour AH, Jafari A, Awais M, Platzner M. A Two-Stage Approximation Methodology for Efficient DNN Hardware Implementation. In: <i>2025 IEEE 28th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)</i>. IEEE; 2025. doi:<a href="https://doi.org/10.1109/ddecs63720.2025.11006769">10.1109/ddecs63720.2025.11006769</a> info:eu-repo/semantics/altIdentifier/doi/10.1109/ddecs63720.2025.11006769 info:eu-repo/semantics/closedAccess