[{"publication_identifier":{"issn":["0278-0070","1937-4151"]},"author":[{"full_name":"Hölscher, Nils","last_name":"Hölscher","first_name":"Nils"},{"full_name":"Hakert, Christian","first_name":"Christian","last_name":"Hakert"},{"full_name":"Nassar, Hassan","first_name":"Hassan","last_name":"Nassar"},{"full_name":"Chen, Kuan-Hsun","first_name":"Kuan-Hsun","last_name":"Chen"},{"first_name":"Lars","last_name":"Bauer","full_name":"Bauer, Lars"},{"first_name":"Jian-Jia","last_name":"Chen","full_name":"Chen, Jian-Jia"},{"full_name":"Henkel, Jörg","first_name":"Jörg","last_name":"Henkel"}],"status":"public","year":"2022","title":"Memory Carousel: LLVM-Based Bitwise Wear Leveling for Nonvolatile Main Memory","intvolume":"        42","publication_status":"published","date_updated":"2026-07-05T14:46:44Z","_id":"66181","publisher":"Institute of Electrical and Electronics Engineers (IEEE)","page":"2527-2539","volume":42,"user_id":"128464","doi":"10.1109/tcad.2022.3228897","citation":{"bibtex":"@article{Hölscher_Hakert_Nassar_Chen_Bauer_Chen_Henkel_2022, title={Memory Carousel: LLVM-Based Bitwise Wear Leveling for Nonvolatile Main Memory}, volume={42}, DOI={<a href=\"https://doi.org/10.1109/tcad.2022.3228897\">10.1109/tcad.2022.3228897</a>}, number={8}, journal={IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems}, publisher={Institute of Electrical and Electronics Engineers (IEEE)}, author={Hölscher, Nils and Hakert, Christian and Nassar, Hassan and Chen, Kuan-Hsun and Bauer, Lars and Chen, Jian-Jia and Henkel, Jörg}, year={2022}, pages={2527–2539} }","ama":"Hölscher N, Hakert C, Nassar H, et al. Memory Carousel: LLVM-Based Bitwise Wear Leveling for Nonvolatile Main Memory. <i>IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems</i>. 2022;42(8):2527-2539. doi:<a href=\"https://doi.org/10.1109/tcad.2022.3228897\">10.1109/tcad.2022.3228897</a>","mla":"Hölscher, Nils, et al. “Memory Carousel: LLVM-Based Bitwise Wear Leveling for Nonvolatile Main Memory.” <i>IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems</i>, vol. 42, no. 8, Institute of Electrical and Electronics Engineers (IEEE), 2022, pp. 2527–39, doi:<a href=\"https://doi.org/10.1109/tcad.2022.3228897\">10.1109/tcad.2022.3228897</a>.","short":"N. Hölscher, C. Hakert, H. Nassar, K.-H. Chen, L. Bauer, J.-J. Chen, J. Henkel, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 42 (2022) 2527–2539.","chicago":"Hölscher, Nils, Christian Hakert, Hassan Nassar, Kuan-Hsun Chen, Lars Bauer, Jian-Jia Chen, and Jörg Henkel. “Memory Carousel: LLVM-Based Bitwise Wear Leveling for Nonvolatile Main Memory.” <i>IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems</i> 42, no. 8 (2022): 2527–39. <a href=\"https://doi.org/10.1109/tcad.2022.3228897\">https://doi.org/10.1109/tcad.2022.3228897</a>.","ieee":"N. Hölscher <i>et al.</i>, “Memory Carousel: LLVM-Based Bitwise Wear Leveling for Nonvolatile Main Memory,” <i>IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems</i>, vol. 42, no. 8, pp. 2527–2539, 2022, doi: <a href=\"https://doi.org/10.1109/tcad.2022.3228897\">10.1109/tcad.2022.3228897</a>.","apa":"Hölscher, N., Hakert, C., Nassar, H., Chen, K.-H., Bauer, L., Chen, J.-J., &#38; Henkel, J. (2022). Memory Carousel: LLVM-Based Bitwise Wear Leveling for Nonvolatile Main Memory. <i>IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems</i>, <i>42</i>(8), 2527–2539. <a href=\"https://doi.org/10.1109/tcad.2022.3228897\">https://doi.org/10.1109/tcad.2022.3228897</a>"},"issue":"8","publication":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","date_created":"2026-07-03T21:13:49Z","type":"journal_article"}]