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        <dc:title>Efficient Realization of Decision Trees for Real-Time Inference</dc:title>
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        <bibo:abstract>&lt;jats:p&gt;For timing-sensitive edge applications, the demand for efficient lightweight machine learning solutions has increased recently. Tree ensembles are among the state-of-the-art in many machine learning applications. While single decision trees are comparably small, an ensemble of trees can have a significant memory footprint leading to cache locality issues, which are crucial to performance in terms of execution time. In this work, we analyze memory-locality issues of the two most common realizations of decision trees, i.e., native and if-else trees. We highlight that both realizations demand a more careful memory layout to improve caching behavior and maximize performance. We adopt a probabilistic model of decision tree inference to find the best memory layout for each tree at the application layer. Further, we present an efficient heuristic to take architecture-dependent information into account thereby optimizing the given ensemble for a target computer architecture. Our code-generation framework, which is freely available on an open-source repository, produces optimized code sessions while preserving the structure and accuracy of the trees. With several real-world data sets, we evaluate the elapsed time of various tree realizations on server hardware as well as embedded systems for Intel and ARM processors. Our optimized memory layout achieves a reduction in execution time up to 75 % execution for server-class systems, and up to 70 % for embedded systems, respectively.&lt;/jats:p&gt;</bibo:abstract>
        <bibo:volume>21</bibo:volume>
        <bibo:issue>6</bibo:issue>
        <bibo:startPage>1-26</bibo:startPage>
        <bibo:endPage>1-26</bibo:endPage>
        <dc:publisher>Association for Computing Machinery (ACM)</dc:publisher>
        <bibo:doi rdf:resource="10.1145/3508019" />
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