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<titleInfo><title>NS-FTL: Alleviating the Uneven Bit-Level Wearing of NVRAM-based FTL via NAND-SPIN</title></titleInfo>


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<name type="personal">
  <namePart type="given">Wei-Chun</namePart>
  <namePart type="family">Cheng</namePart>
  <role><roleTerm type="text">author</roleTerm> </role></name>
<name type="personal">
  <namePart type="given">Shuo-Han</namePart>
  <namePart type="family">Chen</namePart>
  <role><roleTerm type="text">author</roleTerm> </role></name>
<name type="personal">
  <namePart type="given">Yuan-Hao</namePart>
  <namePart type="family">Chang</namePart>
  <role><roleTerm type="text">author</roleTerm> </role></name>
<name type="personal">
  <namePart type="given">Kuan-Hsun</namePart>
  <namePart type="family">Chen</namePart>
  <role><roleTerm type="text">author</roleTerm> </role></name>
<name type="personal">
  <namePart type="given">Jian-Jia</namePart>
  <namePart type="family">Chen</namePart>
  <role><roleTerm type="text">author</roleTerm> </role></name>
<name type="personal">
  <namePart type="given">Tseng-Yi</namePart>
  <namePart type="family">Chen</namePart>
  <role><roleTerm type="text">author</roleTerm> </role></name>
<name type="personal">
  <namePart type="given">Ming-Chang</namePart>
  <namePart type="family">Yang</namePart>
  <role><roleTerm type="text">author</roleTerm> </role></name>
<name type="personal">
  <namePart type="given">Wei-Kuan</namePart>
  <namePart type="family">Shih</namePart>
  <role><roleTerm type="text">author</roleTerm> </role></name>















<originInfo><publisher>IEEE</publisher><dateIssued encoding="w3cdtf">2020</dateIssued>
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<relatedItem type="host"><titleInfo><title>2020 9th Non-Volatile Memory Systems and Applications Symposium (NVMSA)</title></titleInfo><identifier type="doi">10.1109/nvmsa51238.2020.9188172</identifier>
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<ieee>W.-C. Cheng &lt;i&gt;et al.&lt;/i&gt;, “NS-FTL: Alleviating the Uneven Bit-Level Wearing of NVRAM-based FTL via NAND-SPIN,” 2020, doi: &lt;a href=&quot;https://doi.org/10.1109/nvmsa51238.2020.9188172&quot;&gt;10.1109/nvmsa51238.2020.9188172&lt;/a&gt;.</ieee>
<apa>Cheng, W.-C., Chen, S.-H., Chang, Y.-H., Chen, K.-H., Chen, J.-J., Chen, T.-Y., Yang, M.-C., &amp;#38; Shih, W.-K. (2020). NS-FTL: Alleviating the Uneven Bit-Level Wearing of NVRAM-based FTL via NAND-SPIN. &lt;i&gt;2020 9th Non-Volatile Memory Systems and Applications Symposium (NVMSA)&lt;/i&gt;. &lt;a href=&quot;https://doi.org/10.1109/nvmsa51238.2020.9188172&quot;&gt;https://doi.org/10.1109/nvmsa51238.2020.9188172&lt;/a&gt;</apa>
<short>W.-C. Cheng, S.-H. Chen, Y.-H. Chang, K.-H. Chen, J.-J. Chen, T.-Y. Chen, M.-C. Yang, W.-K. Shih, in: 2020 9th Non-Volatile Memory Systems and Applications Symposium (NVMSA), IEEE, 2020.</short>
<chicago>Cheng, Wei-Chun, Shuo-Han Chen, Yuan-Hao Chang, Kuan-Hsun Chen, Jian-Jia Chen, Tseng-Yi Chen, Ming-Chang Yang, and Wei-Kuan Shih. “NS-FTL: Alleviating the Uneven Bit-Level Wearing of NVRAM-Based FTL via NAND-SPIN.” In &lt;i&gt;2020 9th Non-Volatile Memory Systems and Applications Symposium (NVMSA)&lt;/i&gt;. IEEE, 2020. &lt;a href=&quot;https://doi.org/10.1109/nvmsa51238.2020.9188172&quot;&gt;https://doi.org/10.1109/nvmsa51238.2020.9188172&lt;/a&gt;.</chicago>
<mla>Cheng, Wei-Chun, et al. “NS-FTL: Alleviating the Uneven Bit-Level Wearing of NVRAM-Based FTL via NAND-SPIN.” &lt;i&gt;2020 9th Non-Volatile Memory Systems and Applications Symposium (NVMSA)&lt;/i&gt;, IEEE, 2020, doi:&lt;a href=&quot;https://doi.org/10.1109/nvmsa51238.2020.9188172&quot;&gt;10.1109/nvmsa51238.2020.9188172&lt;/a&gt;.</mla>
<bibtex>@inproceedings{Cheng_Chen_Chang_Chen_Chen_Chen_Yang_Shih_2020, title={NS-FTL: Alleviating the Uneven Bit-Level Wearing of NVRAM-based FTL via NAND-SPIN}, DOI={&lt;a href=&quot;https://doi.org/10.1109/nvmsa51238.2020.9188172&quot;&gt;10.1109/nvmsa51238.2020.9188172&lt;/a&gt;}, booktitle={2020 9th Non-Volatile Memory Systems and Applications Symposium (NVMSA)}, publisher={IEEE}, author={Cheng, Wei-Chun and Chen, Shuo-Han and Chang, Yuan-Hao and Chen, Kuan-Hsun and Chen, Jian-Jia and Chen, Tseng-Yi and Yang, Ming-Chang and Shih, Wei-Kuan}, year={2020} }</bibtex>
<ama>Cheng W-C, Chen S-H, Chang Y-H, et al. NS-FTL: Alleviating the Uneven Bit-Level Wearing of NVRAM-based FTL via NAND-SPIN. In: &lt;i&gt;2020 9th Non-Volatile Memory Systems and Applications Symposium (NVMSA)&lt;/i&gt;. IEEE; 2020. doi:&lt;a href=&quot;https://doi.org/10.1109/nvmsa51238.2020.9188172&quot;&gt;10.1109/nvmsa51238.2020.9188172&lt;/a&gt;</ama>
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