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<titleInfo><title>A gem5-based Simulation Framework for Computing-in-DRAM</title></titleInfo>





<name type="personal">
  <namePart type="given">Alexander</namePart>
  <namePart type="family">Kusnezoff</namePart>
  <role><roleTerm type="text">author</roleTerm> </role></name>
<name type="personal">
  <namePart type="given">João Paulo Cardoso De</namePart>
  <namePart type="family">Lima</namePart>
  <role><roleTerm type="text">author</roleTerm> </role></name>
<name type="personal">
  <namePart type="given">Jeronimo</namePart>
  <namePart type="family">Castrillon</namePart>
  <role><roleTerm type="text">author</roleTerm> </role></name>
<name type="personal">
  <namePart type="given">Asif Ali</namePart>
  <namePart type="family">Khan</namePart>
  <role><roleTerm type="text">author</roleTerm> </role></name>














<abstract lang="eng">Computing-in-Memory using DRAM (CIMD) has demonstrated substantial energy and throughput gains for memory-bound workloads consisting of bulk-bitwise operations, by performing computation directly within DRAM subarrays. Realizing CIMD, however, requires a redesign of the memory controller and careful mapping of operands onto the memory arrays. Presently, accurate FPGA-based testbeds exist but they are costly and labor-intensive, while open-source simulators are largely trace-based and cannot execute full application runs. The only full-application CIMD simulator available, included with MIMDRAM [1], is built on an outdated version of gem5 and its toolchains. We present gem5-CIMD, a full-system CIMD simulation framework built on the latest gem5 simulation framework. We extend the simulated instruction set from four bitwise operations to sixteen CIM instructions spanning arithmetic, relational, conditional, and utility operations across a range of data types and bitwidths (4 to 64 bits) . A complete memory-management stack – comprising multi-level huge-page support, a CIM-aware allocator, and a subarray-aware address-mapping scheme – ensures that CIM operands are co-located in the same DRAM subarray. In addition, gem5-CIMD is aware of the DRAM refresh interval and faithfully models and schedules the mandatory refresh operations when needed. We provide a CIM standard library intended as a compiler target and evaluate gem5-CIMD on multiple case studies including an end-to-end KNN workload. The simulator sources, including the evaluated workloads, are available at https://github.com/tud-ccc/gem5-CIMD.</abstract>

<originInfo><publisher>IEEE</publisher><dateIssued encoding="w3cdtf">2026</dateIssued>
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<relatedItem type="host"><titleInfo><title>Proceedings of the IEEE Cross-disciplinary Conference on Memory-Centric Computing (CCMCC)</title></titleInfo>
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<bibtex>@inproceedings{Kusnezoff_Lima_Castrillon_Khan_2026, title={A gem5-based Simulation Framework for Computing-in-DRAM}, booktitle={Proceedings of the IEEE Cross-disciplinary Conference on Memory-Centric Computing (CCMCC)}, publisher={IEEE}, author={Kusnezoff, Alexander and Lima, João Paulo Cardoso De and Castrillon, Jeronimo and Khan, Asif Ali}, year={2026} }</bibtex>
<apa>Kusnezoff, A., Lima, J. P. C. D., Castrillon, J., &amp;#38; Khan, A. A. (2026). A gem5-based Simulation Framework for Computing-in-DRAM. &lt;i&gt;Proceedings of the IEEE Cross-Disciplinary Conference on Memory-Centric Computing (CCMCC)&lt;/i&gt;.</apa>
<ama>Kusnezoff A, Lima JPCD, Castrillon J, Khan AA. A gem5-based Simulation Framework for Computing-in-DRAM. In: &lt;i&gt;Proceedings of the IEEE Cross-Disciplinary Conference on Memory-Centric Computing (CCMCC)&lt;/i&gt;. IEEE; 2026.</ama>
<chicago>Kusnezoff, Alexander, João Paulo Cardoso De Lima, Jeronimo Castrillon, and Asif Ali Khan. “A Gem5-Based Simulation Framework for Computing-in-DRAM.” In &lt;i&gt;Proceedings of the IEEE Cross-Disciplinary Conference on Memory-Centric Computing (CCMCC)&lt;/i&gt;. IEEE, 2026.</chicago>
<short>A. Kusnezoff, J.P.C.D. Lima, J. Castrillon, A.A. Khan, in: Proceedings of the IEEE Cross-Disciplinary Conference on Memory-Centric Computing (CCMCC), IEEE, 2026.</short>
<ieee>A. Kusnezoff, J. P. C. D. Lima, J. Castrillon, and A. A. Khan, “A gem5-based Simulation Framework for Computing-in-DRAM,” 2026.</ieee>
<mla>Kusnezoff, Alexander, et al. “A Gem5-Based Simulation Framework for Computing-in-DRAM.” &lt;i&gt;Proceedings of the IEEE Cross-Disciplinary Conference on Memory-Centric Computing (CCMCC)&lt;/i&gt;, IEEE, 2026.</mla>
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