---
_id: '67566'
abstract:
- lang: eng
  text: Massively parallel computer architectures based on identical microprocessor
    tiles are well known for their high scalability and performance. In this work,
    we introduce the design and simulation of a scalable on-chip grid of RISC-V processors
    with local memories in a structured EDA flow. We specify a Grid of Processing
    Cells (GPC) with two non-trivial software applications and successively generate
    and validate the hardware models at lower abstraction levels, namely TLM, ISS,
    RTL, and FPGA. Our comprehensive experimental evaluation of a physical implementation
    on an FPGA shows the true scalability of the GPC architecture. While existing
    works have indicated performance benefits for GPCs at high abstraction levels,
    our results confirm their highly reduced interconnect contention for the first
    time on fully constructed hardware with clock-cycle accuracy at RTL and on FPGAs.
author:
- first_name: Lars
  full_name: Luchterhandt, Lars
  id: '74648'
  last_name: Luchterhandt
- first_name: Vivek
  full_name: Govindasamy, Vivek
  last_name: Govindasamy
- first_name: Yutong
  full_name: Wang, Yutong
  last_name: Wang
- first_name: Rainer
  full_name: Dömer, Rainer
  last_name: Dömer
- first_name: Wolfgang
  full_name: Müller, Wolfgang
  id: '16243'
  last_name: Müller
- first_name: Christoph
  full_name: Scheytt, Christoph
  id: '37144'
  last_name: Scheytt
  orcid: '0000-0002-5950-6618 '
citation:
  ama: 'Luchterhandt L, Govindasamy V, Wang Y, Dömer R, Müller W, Scheytt C. Truly
    Scalable Grids of RISC-V Processors with Local Memories. In: <i>MBMV 2026 - 29.
    Workshop Methoden Und Beschreibungssprachen Zur Modellierung Und Verifikation
    von Schaltungen Und Systemen</i>. VDE Verlag; 2026.'
  apa: Luchterhandt, L., Govindasamy, V., Wang, Y., Dömer, R., Müller, W., &#38; Scheytt,
    C. (2026). Truly Scalable Grids of RISC-V Processors with Local Memories. <i>MBMV
    2026 - 29. Workshop Methoden Und Beschreibungssprachen Zur Modellierung Und Verifikation
    von Schaltungen Und Systemen</i>. MBMV 2026 - 29. Workshop, Würzburg, Germany.
  bibtex: '@inproceedings{Luchterhandt_Govindasamy_Wang_Dömer_Müller_Scheytt_2026,
    title={Truly Scalable Grids of RISC-V Processors with Local Memories}, booktitle={MBMV
    2026 - 29. Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation
    von Schaltungen und Systemen}, publisher={VDE Verlag}, author={Luchterhandt, Lars
    and Govindasamy, Vivek and Wang, Yutong and Dömer, Rainer and Müller, Wolfgang
    and Scheytt, Christoph}, year={2026} }'
  chicago: Luchterhandt, Lars, Vivek Govindasamy, Yutong Wang, Rainer Dömer, Wolfgang
    Müller, and Christoph Scheytt. “Truly Scalable Grids of RISC-V Processors with
    Local Memories.” In <i>MBMV 2026 - 29. Workshop Methoden Und Beschreibungssprachen
    Zur Modellierung Und Verifikation von Schaltungen Und Systemen</i>. VDE Verlag,
    2026.
  ieee: L. Luchterhandt, V. Govindasamy, Y. Wang, R. Dömer, W. Müller, and C. Scheytt,
    “Truly Scalable Grids of RISC-V Processors with Local Memories,” presented at
    the MBMV 2026 - 29. Workshop, Würzburg, Germany, 2026.
  mla: Luchterhandt, Lars, et al. “Truly Scalable Grids of RISC-V Processors with
    Local Memories.” <i>MBMV 2026 - 29. Workshop Methoden Und Beschreibungssprachen
    Zur Modellierung Und Verifikation von Schaltungen Und Systemen</i>, VDE Verlag,
    2026.
  short: 'L. Luchterhandt, V. Govindasamy, Y. Wang, R. Dömer, W. Müller, C. Scheytt,
    in: MBMV 2026 - 29. Workshop Methoden Und Beschreibungssprachen Zur Modellierung
    Und Verifikation von Schaltungen Und Systemen, VDE Verlag, 2026.'
conference:
  end_date: 2026-03-18
  location: Würzburg, Germany
  name: MBMV 2026 - 29. Workshop
  start_date: 2026-03-17
date_created: 2026-10-16T10:00:02Z
date_updated: 2026-10-16T11:32:05Z
department:
- _id: '58'
language:
- iso: eng
publication: MBMV 2026 - 29. Workshop Methoden und Beschreibungssprachen zur Modellierung
  und Verifikation von Schaltungen und Systemen
publication_identifier:
  unknown:
  - 978-3-8007-6762-5
publisher: VDE Verlag
status: public
title: Truly Scalable Grids of RISC-V Processors with Local Memories
type: conference
user_id: '74648'
year: '2026'
...