{"citation":{"ieee":"M. Awais, H. G. Mohammadi, and M. Platzner, “Swift Synthesis of Approximate Hardware Accelerators Using Generative Adversarial Networks,” 2026, doi: <a href=\"https://doi.org/10.1109/vlsi-soc64688.2025.11421759\">10.1109/vlsi-soc64688.2025.11421759</a>.","short":"M. Awais, H.G. Mohammadi, M. Platzner, in: 2025 IFIP/IEEE 33rd International Conference on Very Large Scale Integration (VLSI-SoC), IEEE, 2026.","mla":"Awais, Muhammad, et al. “Swift Synthesis of Approximate Hardware Accelerators Using Generative Adversarial Networks.” <i>2025 IFIP/IEEE 33rd International Conference on Very Large Scale Integration (VLSI-SoC)</i>, IEEE, 2026, doi:<a href=\"https://doi.org/10.1109/vlsi-soc64688.2025.11421759\">10.1109/vlsi-soc64688.2025.11421759</a>.","chicago":"Awais, Muhammad, Hassan Ghasemzadeh Mohammadi, and Marco Platzner. “Swift Synthesis of Approximate Hardware Accelerators Using Generative Adversarial Networks.” In <i>2025 IFIP/IEEE 33rd International Conference on Very Large Scale Integration (VLSI-SoC)</i>. IEEE, 2026. <a href=\"https://doi.org/10.1109/vlsi-soc64688.2025.11421759\">https://doi.org/10.1109/vlsi-soc64688.2025.11421759</a>.","apa":"Awais, M., Mohammadi, H. G., &#38; Platzner, M. (2026). Swift Synthesis of Approximate Hardware Accelerators Using Generative Adversarial Networks. <i>2025 IFIP/IEEE 33rd International Conference on Very Large Scale Integration (VLSI-SoC)</i>. <a href=\"https://doi.org/10.1109/vlsi-soc64688.2025.11421759\">https://doi.org/10.1109/vlsi-soc64688.2025.11421759</a>","bibtex":"@inproceedings{Awais_Mohammadi_Platzner_2026, title={Swift Synthesis of Approximate Hardware Accelerators Using Generative Adversarial Networks}, DOI={<a href=\"https://doi.org/10.1109/vlsi-soc64688.2025.11421759\">10.1109/vlsi-soc64688.2025.11421759</a>}, booktitle={2025 IFIP/IEEE 33rd International Conference on Very Large Scale Integration (VLSI-SoC)}, publisher={IEEE}, author={Awais, Muhammad and Mohammadi, Hassan Ghasemzadeh and Platzner, Marco}, year={2026} }","ama":"Awais M, Mohammadi HG, Platzner M. Swift Synthesis of Approximate Hardware Accelerators Using Generative Adversarial Networks. In: <i>2025 IFIP/IEEE 33rd International Conference on Very Large Scale Integration (VLSI-SoC)</i>. IEEE; 2026. doi:<a href=\"https://doi.org/10.1109/vlsi-soc64688.2025.11421759\">10.1109/vlsi-soc64688.2025.11421759</a>"},"title":"Swift Synthesis of Approximate Hardware Accelerators Using Generative Adversarial Networks","date_created":"2026-10-23T13:26:19Z","doi":"10.1109/vlsi-soc64688.2025.11421759","publisher":"IEEE","type":"conference","publication":"2025 IFIP/IEEE 33rd International Conference on Very Large Scale Integration (VLSI-SoC)","department":[{"_id":"78"}],"publication_status":"published","year":"2026","status":"public","date_updated":"2026-10-23T13:29:31Z","user_id":"64665","_id":"67630","author":[{"full_name":"Awais, Muhammad","first_name":"Muhammad","last_name":"Awais"},{"full_name":"Mohammadi, Hassan Ghasemzadeh","first_name":"Hassan Ghasemzadeh","last_name":"Mohammadi"},{"first_name":"Marco","full_name":"Platzner, Marco","last_name":"Platzner"}],"language":[{"iso":"eng"}]}