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183 Publications


2019 | Preprint | LibreCat-ID: 12878
Accurate Sampling with Noisy Forces from Approximate Computing
V. Rengaraj, M. Lass, C. Plessl, T. Kühne, ArXiv:1907.08497 (2019).
LibreCat | arXiv
 

2018 | Conference Paper | LibreCat-ID: 22
A Data Structure for Planning Based Workload Management of Heterogeneous HPC Systems
A. Keller, in: D. Klusáček, W. Cirne, N. Desai (Eds.), Proc. Workshop on Job Scheduling Strategies for Parallel Processing (JSSPP), Springer, 2018, pp. 132–151.
LibreCat | DOI
 

2018 | Conference Paper | LibreCat-ID: 1588
OpenCL-based FPGA Design to Accelerate the Nodal Discontinuous Galerkin Method for Unstructured Meshes
T. Kenter, G. Mahale, S. Alhaddad, Y. Grynko, C. Schmitt, A. Afzal, F. Hannig, J. Förstner, C. Plessl, in: Proc. Int. Symp. on Field-Programmable Custom Computing Machines (FCCM), IEEE, 2018.
LibreCat | Files available | DOI
 

2018 | Conference Paper | LibreCat-ID: 1204
Automated Code Acceleration Targeting Heterogeneous OpenCL Devices
H. Riebler, G.F. Vaz, T. Kenter, C. Plessl, in: Proc. ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP), ACM, 2018.
LibreCat | Files available | DOI
 

2018 | Conference Paper | LibreCat-ID: 1590
A Massively Parallel Algorithm for the Approximate Calculation of Inverse p-th Roots of Large Sparse Matrices
M. Lass, S. Mohr, H. Wiebeler, T. Kühne, C. Plessl, in: Proc. Platform for Advanced Scientific Computing (PASC) Conference, ACM, New York, NY, USA, 2018.
LibreCat | DOI | arXiv
 

2017 | Conference Paper | LibreCat-ID: 1592
Flexible FPGA design for FDTD using OpenCL
T. Kenter, J. Förstner, C. Plessl, in: Proc. Int. Conf. on Field Programmable Logic and Applications (FPL), IEEE, 2017.
LibreCat | Files available | DOI
 

2016 | Conference Paper | LibreCat-ID: 24
Microdisk Cavity FDTD Simulation on FPGA using OpenCL
T. Kenter, C. Plessl, in: Proc. Workshop on Heterogeneous High-Performance Reconfigurable Computing (H2RC), 2016.
LibreCat | Files available
 

2016 | Conference Paper | LibreCat-ID: 31
Using Just-in-Time Code Generation for Transparent Resource Management in Heterogeneous Systems
H. Riebler, G.F. Vaz, C. Plessl, E.M.G. Trainiti, G.C. Durelli, C. Bolchini, in: Proc. HiPEAC Workshop on Reonfigurable Computing (WRC), 2016.
LibreCat | Files available
 

2016 | Conference Paper | LibreCat-ID: 168
Performance-centric scheduling with task migration for a heterogeneous compute node in the data center
A. Lösch, T. Beisel, T. Kenter, C. Plessl, M. Platzner, in: Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), EDA Consortium / IEEE, 2016, pp. 912–917.
LibreCat | Files available
 

2016 | Conference Paper | LibreCat-ID: 138
Using Just-in-Time Code Generation for Transparent Resource Management in Heterogeneous Systems
H. Riebler, G.F. Vaz, C. Plessl, E.M.G. Trainiti, G.C. Durelli, E. Del Sozzo, M.D. Santambrogio, C. Bolchini, in: Proceedings of International Forum on Research and Technologies for Society and Industry (RTSI), IEEE, 2016, pp. 1–5.
LibreCat | Files available | DOI
 

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