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196 Publications


2020 | Conference Paper | LibreCat-ID: 16213
Awais M, Ghasemzadeh Mohammadi H, Platzner M. A Hybrid Synthesis Methodology for Approximate Circuits. In: Proceedings of the 30th ACM Great Lakes Symposium on VLSI (GLSVLSI) 2020. ACM; :1-6. doi:10.1145/3386263.3406952
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2020 | Conference Paper | LibreCat-ID: 17063
Hansmeier T, Kaufmann P, Platzner M. An Adaption Mechanism for the Error Threshold of XCSF. In: GECCO ’20: Proceedings of the Genetic and Evolutionary Computation Conference Companion. New York, NY, United States: Association for Computing Machinery (ACM); 2020.
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2020 | Conference Paper | LibreCat-ID: 16363
Hansmeier T, Kaufmann P, Platzner M. Enabling XCSF to Cope with Dynamic Environments via an Adaptive Error Threshold. In: GECCO ’20: Proceedings of the Genetic and Evolutionary Computation Conference Companion. New York, NY, United States: Association for Computing Machinery (ACM).
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2020 | Conference Paper | LibreCat-ID: 3583
Guetttatfi Z, Kaufmann P, Platzner M. Optimal and Greedy Heuristic Approaches for Scheduling and Mapping of Hardware Tasks to Reconfigurable Computing Devices. In: Proceedings of the International Workshop on Applied Reconfigurable Computing (ARC). ; 2020.
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2019 | Preprint | LibreCat-ID: 16853
Witschen LM, Ghasemzadeh Mohammadi H, Artmann M, Platzner M. Jump Search: A Fast Technique for the Synthesis of Approximate Circuits. Fourth Workshop on Approximate Computing (AxC 2019).
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2019 | Conference Paper | LibreCat-ID: 10577
Witschen LM, Ghasemzadeh Mohammadi H, Artmann M, Platzner M. Jump Search: A Fast Technique for the Synthesis of Approximate Circuits. In: Proceedings of the 2019 on Great Lakes Symposium on VLSI  - GLSVLSI ’19. New York, NY, USA: ACM; 2019. doi:10.1145/3299874.3317998
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2019 | Conference Paper | LibreCat-ID: 15422
Ho N, Kaufmann P, Platzner M. Optimization of Application-specific L1 Cache Translation Functions of the LEON3 Processor. In: World Congress on Nature and Biologically Inspired Computing (NaBIC). Advances in Nature and Biologically Inspired Computing. Springer; 2019.
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2019 | Conference Paper | LibreCat-ID: 9913
Ahmed QA, Wiersema T, Platzner M. Proof-Carrying Hardware Versus the Stealthy Malicious LUT Hardware Trojan. In: Hochberger C, Nelson B, Koch A, Woods R, Diniz P, eds. Applied Reconfigurable Computing. Vol 11444. Lecture Notes in Computer Science. Cham: Springer International Publishing; 2019:127-136. doi:10.1007/978-3-030-17227-5_10
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2018 | Conference Paper | LibreCat-ID: 3373
Hansmeier T, Platzner M, Andrews D. An FPGA/HMC-Based Accelerator for Resolution Proof Checking. In: ARC 2018: Applied Reconfigurable Computing. Architectures, Tools, and Applications. Vol 10824. Lecture Notes in Computer Science. Springer International Publishing; 2018:153-165. doi:10.1007/978-3-319-78890-6_13
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2018 | Conference Paper | LibreCat-ID: 10598
Awais M, Ghasemzadeh Mohammadi H, Platzner M. An MCTS-based Framework for Synthesis of Approximate Circuits. In: 26th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC). ; 2018:219-224. doi:10.1109/VLSI-SoC.2018.8645026
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2018 | Preprint | LibreCat-ID: 1165
Witschen LM, Wiersema T, Platzner M. Making the Case for Proof-carrying Approximate Circuits. 4th Workshop On Approximate Computing (WAPCO 2018). 2018.
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2018 | Preprint | LibreCat-ID: 3586
Witschen LM, Wiersema T, Ghasemzadeh Mohammadi H, Awais M, Platzner M. CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation. Third Workshop on Approximate Computing (AxC 2018).
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2018 | Conference Paper | LibreCat-ID: 5547
Lösch A, Platzner M. A Highly Accurate Energy Model for Task Execution on Heterogeneous Compute Nodes. In: 2018 IEEE 29th International Conference on Application-Specific Systems, Architectures and Processors (ASAP). IEEE; 2018. doi:10.1109/asap.2018.8445098
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2018 | Conference Paper | LibreCat-ID: 3362
Lösch A, Wiens A, Platzner M. Ampehre: An Open Source Measurement Framework for Heterogeneous Compute Nodes. In: Proceedings of the International Conference on Architecture of Computing Systems (ARCS). Vol 10793. Lecture Notes in Computer Science. Cham: Springer International Publishing; 2018:73-84. doi:10.1007/978-3-319-77610-1_6
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2017 | Conference Paper | LibreCat-ID: 14893
Ghribi I, Abdallah RB, Khalgui M, Platzner M. I-Codesign: A Codesign Methodology for Reconfigurable Embedded Systems. In: Communications in Computer and Information Science. Cham: Springer ; 2017. doi:10.1007/978-3-319-62569-0_8
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2017 | Conference Paper | LibreCat-ID: 10762
Kaufmann P, Kalkreuth R. An Empirical Study on the Parametrization of Cartesian Genetic Programming. In: Genetic and Evolutionary Computation (GECCO), Compendium. ACM; 2017. doi:10.1145/3067695.3075980
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2017 | Conference Paper | LibreCat-ID: 10780
Guettatfi Z, Hübner P, Platzner M, Rinner B. Computational self-awareness as design approach for visual sensor nodes. In: 12th International Symposium on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC). ; 2017:1-8. doi:10.1109/ReCoSoC.2017.8016147
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2017 | Conference Paper | LibreCat-ID: 10760
Kaufmann P, Kalkreuth R. Parametrizing Cartesian Genetic Programming: An Empirical Study. In: KI 2017: Advances in Artificial Intelligence: 40th Annual German Conference on AI. Springer International Publishing; 2017. doi:10.1007/978-3-319-67190-1_26
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2017 | Conference Paper | LibreCat-ID: 10676
Ho N, Kaufmann P, Platzner M. Evolvable caches: Optimization of reconfigurable cache mappings for a LEON3/Linux-based multi-core processor. In: 2017 International Conference on Field Programmable Technology (ICFPT). ; 2017:215-218. doi:10.1109/FPT.2017.8280144
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2017 | Conference Paper | LibreCat-ID: 10761
Kaufmann P, Ho N, Platzner M. Evaluation Methodology for Complex Non-deterministic Functions: A Case Study in Metaheuristic Optimization of Caches. In: Adaptive Hardware and Systems (AHS). IEEE; 2017. doi:10.1109/AHS.2017.8046380
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2017 | Conference Paper | LibreCat-ID: 10672
Ho N, Ashraf II, Kaufmann P, Platzner M. Accurate Private/Shared Classification of Memory Accesses: a Run-time Analysis System for the LEON3 Multi-core Processor. In: Proc. Design, Automation and Test in Europe Conf. (DATE). ; 2017. doi:10.23919/DATE.2017.7927096
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2017 | Conference Paper | LibreCat-ID: 10630
Boschmann A, Thombansen G, Witschen LM, Wiens A, Platzner M. A Zynq-based dynamically reconfigurable high density myoelectric prosthesis controller. In: Design, Automation and Test in Europe (DATE). ; 2017. doi:10.23919/DATE.2017.7927137
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2017 | Conference Paper | LibreCat-ID: 65
Lösch A, Platzner M. reMinMin: A Novel Static Energy-Centric List Scheduling Approach Based on Real Measurements. In: Proceedings of the 28th Annual IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP). ; 2017. doi:10.1109/ASAP.2017.7995272
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2016 | Conference Paper | LibreCat-ID: 168
Lösch A, Beisel T, Kenter T, Plessl C, Platzner M. Performance-centric scheduling with task migration for a heterogeneous compute node in the data center. In: Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE). EDA Consortium / IEEE; 2016:912-917.
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2016 | Conference Paper | LibreCat-ID: 15873
Boschmann A, Agne A, Witschen LM, Thombansen G, Kraus F, Platzner M. FPGA-based acceleration of high density myoelectric signal processing. In: 2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig). IEEE; 2016. doi:10.1109/reconfig.2015.7393312
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2016 | Conference Paper | LibreCat-ID: 10631
Boschmann A, Dosen S, Werner A, Raies A, Farina D. A novel immersive augmented reality system for prosthesis training and assessment. In: Proc. IEEE Int. Conf. Biomed. Health Informatics (BHI). ; 2016.
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2016 | Conference Paper | LibreCat-ID: 10766
Ghribi I, Ben Abdallah R, Khalgui M, Platzner M. RCo-Design: New Visual Environment for Reconfigurable Embedded Systems. In: Proceedings of the 30th European Simulation and Modelling Conference (ESM). ; 2016.
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2016 | Conference Paper | LibreCat-ID: 10622
Anwer J, Platzner M. Boolean Difference Based Reliability Evaluation of Fault Tolerant Circuit Structures on FPGAs. In: Euromicro Conference on Digital System Design (DSD). ; 2016. doi:10.1109/DSD.2016.35
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2016 | Conference Paper | LibreCat-ID: 10768
Ghribi I, Ben Abdallah R, Khalgui M, Platzner M. New Co-design Methodology for Real-time Embedded Systems. In: Proceedings of the 11th International Conference on Software Engineering and Applications (ICSOFT-EA). ; 2016:185-195.
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2016 | Conference Paper | LibreCat-ID: 10712
Meisner S, Platzner M. Thread Shadowing: On the Effectiveness of Error Detection at the Hardware Thread Level. In: Reconfigurable Computing and FPGAs (ReConFig), 2016 International Conference On. ReConFig. ; 2016:1-8. doi:10.1109/ReConFig.2016.7857193
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2016 | Conference Paper | LibreCat-ID: 13151
Graf T, Platzner M. Using Deep Convolutional Neural Networks in Monte Carlo Tree Search. In: Computer and Games. ; 2016.
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2016 | Conference Paper | LibreCat-ID: 13152
Graf T, Platzner M. Monte-Carlo Simulation Balancing Revisited. In: IEEE Computational Intelligence and Games. ; 2016.
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2016 | Conference Paper | LibreCat-ID: 132
Wiersema T, Platzner M. Verifying Worst-Case Completion Times for Reconfigurable Hardware Modules using Proof-Carrying Hardware. In: Proceedings of the 11th International Symposium on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC 2016). ; 2016:1--8. doi:10.1109/ReCoSoC.2016.7533910
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2016 | Conference Paper | LibreCat-ID: 5812
Boschmann A, Agne A, Witschen L, Thombansen G, Kraus F, Platzner M. FPGA-based acceleration of high density myoelectric signal processing. In: 2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig). IEEE; 2016. doi:10.1109/reconfig.2015.7393312
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2015 | Conference Paper | LibreCat-ID: 10693
Kaufmann P, Shen C. Generator Start-up Sequences Optimization for Network Restoration Using Genetic Algorithm and Simulated Annealing. In: Genetic and Evolutionary Computation (GECCO). ACM; 2015:409-416.
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2015 | Conference Paper | LibreCat-ID: 10771
Ghasemzadeh Mohammadi H, Gaillardon P-E, Zhang J, De Micheli G, Sanchez E, Reorda MS. On the design of a fault tolerant ripple-carry adder with controllable-polarity transistors. In: 2015 IEEE Computer Society Annual Symposium on VLSI. IEEE; 2015:491-496. doi:10.1109/ISVLSI.2015.13
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2015 | Conference Paper | LibreCat-ID: 10772
Ghasemzadeh Mohammadi H, Gaillardon P-E, De Micheli G. Fault modeling in controllable polarity silicon nanowire circuits. In: Proceedings of the 2015 Design, Automation & Test in Europe Conference \& Exhibition. EDA Consortium; 2015:453-458. doi:10.7873/DATE.2015.0428
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2015 | Conference Paper | LibreCat-ID: 10779
Guettatfi Z, Kermia O, Khouas A. Over effective hard real-time hardware tasks scheduling and allocation. In: 25th International Conference on Field Programmable Logic and Applications (FPL). Imperial College; 2015. doi:10.1109/FPL.2015.7293994
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2015 | Conference Paper | LibreCat-ID: 10673
Ho N, Ahmed AF, Kaufmann P, Platzner M. Microarchitectural optimization by means of reconfigurable and evolvable cache mappings. In: Proc. NASA/ESA Conf. Adaptive Hardware and Systems (AHS). ; 2015:1-7. doi:10.1109/AHS.2015.7231178
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2015 | Conference Paper | LibreCat-ID: 10765
H.W. Leong P, Amano H, Anderson J, et al. Significant papers from the first 25 years of the FPL conference. In: Proceedings of the 25th International Conference on Field Programmable Logic and Applications (FPL). Imperial College; 2015:1-3. doi:10.1109/FPL.2015.7293747
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2015 | Conference Paper | LibreCat-ID: 10767
Ghribi I, Ben Abdallah R, Khalgui M, Platzner M. New Codesign Solutions for Modelling and Partitioning of Probabilistic Reconfigurable Embedded Software. In: Proceedings of the 29th European Simulation and Modelling Conference (ESM). ; 2015.
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2015 | Conference Paper | LibreCat-ID: 10711
Meisner S, Platzner M. Comparison of thread signatures for error detection in hybrid multi-cores. In: Field Programmable Technology (FPT), 2015 International Conference On. FPT. ; 2015:212-215. doi:10.1109/FPT.2015.7393153
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2015 | Conference Paper | LibreCat-ID: 13153
Graf T, Platzner M. Adaptive Playouts in Monte-Carlo Tree Search with Policy-Gradient Reinforcement Learning. In: Advances in Computer Games: 14th International Conference, ACG 2015, Leiden, The Netherlands, July 1-3, 2015, Revised Selected Papers. Springer International Publishing; 2015:1-11. doi:10.1007/978-3-319-27992-3_1
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2015 | Conference Paper | LibreCat-ID: 1773
Schumacher J, T. Anderson J, Borga A, et al. Improving Packet Processing Performance in the ATLAS FELIX Project – Analysis and Optimization of a Memory-Bounded Algorithm. In: Proc. Int. Conf. on Distributed Event-Based Systems (DEBS). ACM; 2015. doi:10.1145/2675743.2771824
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2015 | Conference Paper | LibreCat-ID: 238
Damschen M, Riebler H, Vaz GF, Plessl C. Transparent offloading of computational hotspots from binary code to Xeon Phi. In: Proceedings of the 2015 Conference on Design, Automation and Test in Europe (DATE). EDA Consortium / IEEE; 2015:1078-1083. doi:10.7873/DATE.2015.1124
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2015 | Conference Paper | LibreCat-ID: 303
Damschen M, Plessl C. Easy-to-Use On-The-Fly Binary Program Acceleration on Many-Cores. In: Proceedings of the 5th International Workshop on Adaptive Self-Tuning Computing Systems (ADAPT). ; 2015.
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2015 | Conference Paper | LibreCat-ID: 269
Wiersema T, Wu S, Platzner M. On-The-Fly Verification of Reconfigurable Image Processing Modules based on a Proof-Carrying Hardware Approach. In: Proceedings of the International Symposium in Reconfigurable Computing (ARC). LNCS. ; 2015:365--372. doi:10.1007/978-3-319-16214-0_32
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2014 | Conference Paper | LibreCat-ID: 10654
Glette K, Kaufmann P. Lookup Table Partial Reconfiguration for an Evolvable Hardware Classifier System. In: IEEE Congress on Evolutionary Computation (CEC). ; 2014.
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2014 | Conference Paper | LibreCat-ID: 10739
Shen C, Kaufmann P, Braun M. A New Distribution Network Reconfiguration and Restoration Path Selection Algorithm. In: Power Systems Computation Conference (PSCC). IEEE; 2014.
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2014 | Conference Paper | LibreCat-ID: 10738
Shen C, Kaufmann P, Braun M. Optimizing the Generator Start-up Sequence After a Power System Blackout. In: IEEE Power and Energy Society General Meeting (IEEE GM). ; 2014.
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2014 | Conference Paper | LibreCat-ID: 10773
Ghasemzadeh Mohammadi H, Gaillardon P-E, Yazdani M, De Micheli G. Fast process variation analysis in nano-scaled technologies using column-wise sparse parameter selection. In: 2014 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH). IEEE; 2014:163-168. doi:10.1109/NANOARCH.2014.6880479
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2014 | Conference Paper | LibreCat-ID: 347
Meisner S, Platzner M. Thread Shadowing: Using Dynamic Redundancy on Hybrid Multi-cores for Error Detection. In: Goehringer D, Santambrogio M, Cardoso JP, Bertels K, eds. Proceedings of the 10th International Symposium on Applied Reconfigurable Computing (ARC). Lecture Notes in Computer Science. Springer; 2014:283-290. doi:10.1007/978-3-319-05960-0_30
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2014 | Conference Paper | LibreCat-ID: 10674
Ho N, Kaufmann P, Platzner M. A hardware/software infrastructure for performance monitoring on LEON3 multicore platforms. In: 24th Intl. Conf. on Field Programmable Logic and Applications (FPL). ; 2014:1-4. doi:10.1109/FPL.2014.6927437
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2014 | Conference Paper | LibreCat-ID: 10633
Boschmann A, Platzner M. Towards robust HD EMG pattern recognition: Reducing electrode displacement effect using structural similarity. In: Proc. IEEE Int. Conf. Eng. Med. Biolog. (EMBC). ; 2014.
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2014 | Conference Paper | LibreCat-ID: 10621
Anwer J, Platzner M, Meisner S. FPGA Redundancy Configurations: An Automated Design Space Exploration. In: Reconfigurable Architectures Workshop (RAW). RAW. ; 2014. doi:10.1109/IPDPSW.2014.37
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2014 | Conference Paper | LibreCat-ID: 10764
Anwer J, Platzner M. Analytic reliability evaluation for fault-tolerant circuit structures on FPGAs. In: IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT). IEEE; 2014:177-184. doi:10.1109/DFT.2014.6962108
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2014 | Conference Paper | LibreCat-ID: 10632
Boschmann A, Platzner M. A computer vision-based approach to high density EMG pattern recognition using structural similarity. In: Proc. MyoElectric Controls Symposium (MEC). ; 2014.
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2014 | Conference Paper | LibreCat-ID: 10677
Ho N, Kaufmann P, Platzner M. Towards self-adaptive caches: A run-time reconfigurable multi-core infrastructure. In: 2014 {IEEE} Intl. Conf. on Evolvable Systems (ICES). ; 2014:31-37. doi:10.1109/ICES.2014.7008719
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2014 | Conference Paper | LibreCat-ID: 13154
Graf T, Platzner M. Common Fate Graph Patterns in Monte Carlo Tree Search for Computer Go. In: 2014 IEEE Conference on Computational Intelligence and Games. ; 2014:1-8. doi:10.1109/CIG.2014.6932863
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2014 | Conference Paper | LibreCat-ID: 1778
C. Durelli G, Pogliani M, Miele A, et al. Runtime Resource Management in Heterogeneous System Architectures: The SAVE Approach. In: Proc. Int. Symp. on Parallel and Distributed Processing with Applications (ISPA). IEEE; 2014:142-149. doi:10.1109/ISPA.2014.27
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2014 | Conference Paper | LibreCat-ID: 1780
C. Durelli G, Copolla M, Djafarian K, et al. SAVE: Towards efficient resource management in heterogeneous system architectures. In: Proc. Int. Conf. on Reconfigurable Computing: Architectures, Tools and Applications (ARC). Springer; 2014. doi:10.1007/978-3-319-05960-0_38
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2014 | Conference Paper | LibreCat-ID: 388
Kenter T, Vaz GF, Plessl C. Partitioning and Vectorizing Binary Applications for a Reconfigurable Vector Computer. In: Proceedings of the International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications (ARC). Vol 8405. Lecture Notes in Computer Science (LNCS). Cham: Springer International Publishing; 2014:144-155. doi:10.1007/978-3-319-05960-0_13
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2014 | Conference Paper | LibreCat-ID: 406
Kenter T, Schmitz H, Plessl C. Kernel-Centric Acceleration of High Accuracy Stereo-Matching. In: Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig). IEEE; 2014:1-8. doi:10.1109/ReConFig.2014.7032535
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2014 | Conference Paper | LibreCat-ID: 439
Vaz GF, Riebler H, Kenter T, Plessl C. Deferring Accelerator Offloading Decisions to Application Runtime. In: Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig). IEEE; 2014:1-8. doi:10.1109/ReConFig.2014.7032509
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2014 | Conference Paper | LibreCat-ID: 377
Riebler H, Kenter T, Plessl C, Sorge C. Reconstructing AES Key Schedules from Decayed Memory with FPGAs. In: Proceedings of Field-Programmable Custom Computing Machines (FCCM). IEEE; 2014:222-229. doi:10.1109/FCCM.2014.67
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2014 | Conference Paper | LibreCat-ID: 399
Wiersema T, Drzevitzky S, Platzner M. Memory Security in Reconfigurable Computers: Combining Formal Verification with Monitoring. In: Proceedings of the International Conference on Field-Programmable Technology (FPT). ; 2014:167-174. doi:10.1109/FPT.2014.7082771
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2014 | Conference Paper | LibreCat-ID: 408
Jakobs M-C, Platzner M, Wiersema T, Wehrheim H. Integrating Software and Hardware Verification. In: Albert E, Sekerinski E, eds. Proceedings of the 11th International Conference on Integrated Formal Methods (IFM). LNCS. ; 2014:307-322. doi:10.1007/978-3-319-10181-1_19
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2014 | Conference Paper | LibreCat-ID: 433
Wiersema T, Bockhorn A, Platzner M. Embedding FPGA Overlays into Configurable Systems-on-Chip: ReconOS meets ZUMA. In: Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig). ; 2014:1-6. doi:10.1109/ReConFig.2014.7032514
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2014 | Conference Paper | LibreCat-ID: 1782
Graf T, Schaefers L, Platzner M. On Semeai Detection in Monte-Carlo Go. In: Proc. Conf. on Computers and Games (CG). Lecture Notes in Computer Science. Switzerland: Springer; 2014:14-25. doi:10.1007/978-3-319-09165-5_2
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2013 | Conference Paper | LibreCat-ID: 1787
Suess T, Schoenrock A, Meisner S, Plessl C. Parallel Macro Pipelining on the Intel SCC Many-Core Computer. In: Proc. Int. Symp. on Parallel and Distributed Processing Workshops (IPDPSW). Washington, DC, USA: IEEE Computer Society; 2013:64-73. doi:10.1109/IPDPSW.2013.136
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2013 | Conference Paper | LibreCat-ID: 505
Happe M, Kling P, Plessl C, Platzner M, Meyer auf der Heide F. On-The-Fly Computing: A Novel Paradigm for Individualized IT Services. In: Proceedings of the 9th IEEE Workshop on Software Technology for Future Embedded and Ubiquitous Systems (SEUS). IEEE; 2013. doi:10.1109/ISORC.2013.6913232
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2013 | Conference Paper | LibreCat-ID: 10655
Glette K, Kaufmann P, Assad C, Wolf M. Investigating Evolvable Hardware Classification for the BioSleeve Electromyographic Interface. In: IEEE Intl. Conf. on Evolvable Systems (ICES). Vol 1. LNCS. Springer; 2013:1-1.
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2013 | Conference Paper | LibreCat-ID: 10745
Toebermann C, Geibel D, Hau M, et al. Real-Time Simulation of Distribution Grids with high Penetration of Regenerative and Distributed Generation. In: Real-Time Conference. OPAL RT Paris; 2013.
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2013 | Conference Paper | LibreCat-ID: 10774
Ghasemzadeh Mohammadi H, Gaillardon P-E, Yazdani M, De Micheli G. A fast TCAD-based methodology for Variation analysis of emerging nano-devices. In: 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS). IEEE; 2013:83-88. doi:10.1109/DFT.2013.6653587
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2013 | Conference Paper | LibreCat-ID: 10775
Gaillardon P-E, Ghasemzadeh Mohammadi H, De Micheli G. Vertically-stacked silicon nanowire transistors with controllable polarity: A robustness study. In: 2013 14th Latin American Test Workshop-LATW. IEEE; 2013:1-6. doi:10.1109/LATW.2013.6562673
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2013 | Conference Paper | LibreCat-ID: 13645
Graf T, Schäfers L, Platzner M. On Semeai Detection in Monte-Carlo Go. In: Proceedings of the International Conference on Computers and Games (CG). Springer; 2013.
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2013 | Conference Paper | LibreCat-ID: 10634
Boschmann A, Nofen B, Platzner M. Improving transient state myoelectric signal recognition in hand movement classification using gyroscopes. In: Proc. IEEE Int. Conf. Eng. Med. Biolog. (EMBC). ; 2013.
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2013 | Conference Paper | LibreCat-ID: 10635
Boschmann A, Platzner M. Reducing the limb position effect in pattern recognition based myoelectric control using a high density electrode array. In: Proc. IEEE ISSNIP Biosignals and Biorobotics Conference (BRC). ; 2013.
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2013 | Conference Paper | LibreCat-ID: 10620
Anwer J, Meisner S, Platzner M. Dynamic reliability management: Reconfiguring reliability-levels of hardware designs at runtime. In: Reconfigurable Computing and FPGAs (ReConFig), 2013 International Conference On. ; 2013:1-6. doi:10.1109/ReConFig.2013.6732280
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2013 | Conference Paper | LibreCat-ID: 528
Riebler H, Kenter T, Sorge C, Plessl C. FPGA-accelerated Key Search for Cold-Boot Attacks against AES. In: Proceedings of the International Conference on Field-Programmable Technology (FPT). IEEE; 2013:386-389. doi:10.1109/FPT.2013.6718394
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2013 | Conference Paper | LibreCat-ID: 1786
Kasap S, Redif S. FPGA Implementation of a Second-Order Convolutive Blind Signal Separation Algorithm. In: Proc. IEEE Signal Processing and Communications Conf. (SUI). IEEE; 2013. doi:10.1109/SIU.2013.6531530
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2012 | Conference Paper | LibreCat-ID: 615
Happe M, Hangmann H, Agne A, Plessl C. Eight Ways to put your FPGA on Fire – A Systematic Study of Heat Generators. In: Proceedings of the International Conference on Reconfigurable Computing and FPGAs (ReConFig). IEEE; 2012:1-8. doi:10.1109/ReConFig.2012.6416745
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2012 | Conference Paper | LibreCat-ID: 612
Rüthing C, Happe M, Agne A, Plessl C. Exploration of Ring Oscillator Design Space for Temperature Measurements on FPGAs. In: Proceedings of the International Conference on Field Programmable Logic and Applications (FPL). IEEE; 2012:559-562. doi:10.1109/FPL.2012.6339370
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2012 | Conference Paper | LibreCat-ID: 10636
Boschmann A, Platzner M. Reducing classification accuracy degradation of pattern recognition based myoelectric control caused by electrode shift using a high density electrode array. In: Proc. IEEE Int. Conf. Eng. Med. Biolog. (EMBC). ; 2012.
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2012 | Conference Paper | LibreCat-ID: 591
Kenter T, Plessl C, Schmitz H. Pragma based parallelization - Trading hardware efficiency for ease of use? In: Proceedings of the International Conference on ReConFigurable Computing and FPGAs (ReConFig). IEEE; 2012:1-8. doi:10.1109/ReConFig.2012.6416773
LibreCat | Files available | DOI
 

2012 | Conference Paper | LibreCat-ID: 2106
Meyer B, Schumacher J, Plessl C, Förstner J. Convey Vector Personalities – FPGA Acceleration with an OpenMP-like Effort? In: Proc. Int. Conf. on Field Programmable Logic and Applications (FPL). IEEE; 2012:189-196. doi:10.1109/FPL.2012.6339370
LibreCat | Files available | DOI
 

2012 | Conference Paper | LibreCat-ID: 567
Barrio P, Carreras C, Sierra R, Kenter T, Plessl C. Turning control flow graphs into function calls: Code generation for heterogeneous architectures. In: Proceedings of the International Conference on High Performance Computing and Simulation (HPCS). IEEE; 2012:559-565. doi:10.1109/HPCSim.2012.6266973
LibreCat | Files available | DOI
 

2012 | Conference Paper | LibreCat-ID: 609
Happe M, Agne A, Plessl C, Platzner M. Hardware/Software Platform for Self-aware Compute Nodes. In: Proceedings of the Workshop on Self-Awareness in Reconfigurable Computing Systems (SRCS). ; 2012:8-9.
LibreCat | Files available
 

2012 | Conference Paper | LibreCat-ID: 2180
Beisel T, Wiersema T, Plessl C, Brinkmann A. Programming and Scheduling Model for Supporting Heterogeneous Accelerators in Linux. In: Proc. Workshop on Computer Architecture and Operating System Co-Design (CAOS). ; 2012.
LibreCat
 

2012 | Conference Paper | LibreCat-ID: 2103
Wistuba M, Schaefers L, Platzner M. Comparison of Bayesian Move Prediction Systems for Computer Go. In: Proc. IEEE Conf. on Computational Intelligence and Games (CIG). IEEE; 2012:91-99. doi:10.1109/CIG.2012.6374143
LibreCat | DOI
 

2012 | Conference Paper | LibreCat-ID: 2100
Kasap S, Redif S. FPGA implementation of a second-order convolutive blind signal separation algorithm. In: Int. Architecture and Engineering Symp. (ARCHENG). ; 2012.
LibreCat
 

2012 | Conference Paper | LibreCat-ID: 2097
Kasap S, Redif S. FPGA-based design and implementation of an approximate polynomial matrix EVD algorithm. In: Proc. Int. Conf. on Field Programmable Technology (ICFPT). IEEE Computer Society; 2012:135-140. doi:10.1109/FPT.2012.6412125
LibreCat | DOI
 

2011 | Conference Paper | LibreCat-ID: 656
Happe M, Agne A, Plessl C. Measuring and Predicting Temperature Distributions on FPGAs at Run-Time. In: Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs (ReConFig). IEEE; 2011:55-60. doi:10.1109/ReConFig.2011.59
LibreCat | Files available | DOI
 

2011 | Conference Paper | LibreCat-ID: 13643
Agne A, Platzner M, Lübbers E. Memory Virtualization for Multithreaded Reconfigurable Hardware. In: Proceedings of the International Conference on Field Programmable Logic and Applications (FPL). IEEE; 2011:185-188. doi:10.1109/fpl.2011.42
LibreCat | DOI
 

2011 | Conference Paper | LibreCat-ID: 13644
Henkel J, Hedrich L, Herkersdorf A, et al. Design and architectures for dependable embedded systems. In: Proceedings of the Seventh IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis - CODES+ISSS ’11. ; 2011. doi:10.1145/2039370.2039384
LibreCat | DOI
 

2011 | Conference Paper | LibreCat-ID: 10637
Boschmann A, Kaufmann P, Platzner M. Accurate gait phase detection using surface electromyographic signals and support vector machines. In: Proc. IEEE Int. Conf. Bioinformatics and Biomedical Technology (ICBBT). ; 2011.
LibreCat
 

2011 | Conference Paper | LibreCat-ID: 10638
Boschmann A, Platzner M, Robrecht M, Hahn M, Winkler M. Development of a pattern recognition-based myoelectric transhumeral prosthesis with multifunctional simultaneous control using a model-driven ppproach for mechatronic systems. In: Proc. MyoElectric Controls Symposium (MEC). ; 2011.
LibreCat
 

2011 | Conference Paper | LibreCat-ID: 2194
Meyer B, Plessl C, Förstner J. Transformation of scientific algorithms to parallel computing code: subdomain support in a MPI-multi-GPU backend. In: Symp. on Application Accelerators in High Performance Computing (SAAHPC). IEEE Computer Society; 2011:60-63. doi:10.1109/SAAHPC.2011.12
LibreCat | DOI
 

2011 | Conference Paper | LibreCat-ID: 2198
Grad M, Plessl C. Just-in-time Instruction Set Extension – Feasibility and Limitations for an FPGA-based Reconfigurable ASIP Architecture. In: Proc. Reconfigurable Architectures Workshop (RAW). IEEE Computer Society; 2011:278-285. doi:10.1109/IPDPS.2011.153
LibreCat | DOI
 

2011 | Conference Paper | LibreCat-ID: 666
Drzevitzky S, Platzner M. Achieving Hardware Security for Reconfigurable Systems on Chip by a Proof-Carrying Code Approach. In: Proceedings of the 6th International Workshop on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC). ; 2011:58-65. doi:10.1109/ReCoSoC.2011.5981499
LibreCat | Files available | DOI
 

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