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196 Publications


2020 | Conference Paper | LibreCat-ID: 16213
A Hybrid Synthesis Methodology for Approximate Circuits
M. Awais, H. Ghasemzadeh Mohammadi, M. Platzner, in: Proceedings of the 30th ACM Great Lakes Symposium on VLSI (GLSVLSI) 2020, ACM, n.d., pp. 1–6.
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2020 | Conference Paper | LibreCat-ID: 17063
An Adaption Mechanism for the Error Threshold of XCSF
T. Hansmeier, P. Kaufmann, M. Platzner, in: GECCO ’20: Proceedings of the Genetic and Evolutionary Computation Conference Companion, Association for Computing Machinery (ACM), New York, NY, United States, 2020.
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2020 | Conference Paper | LibreCat-ID: 16363
Enabling XCSF to Cope with Dynamic Environments via an Adaptive Error Threshold
T. Hansmeier, P. Kaufmann, M. Platzner, in: GECCO ’20: Proceedings of the Genetic and Evolutionary Computation Conference Companion, Association for Computing Machinery (ACM), New York, NY, United States, n.d.
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2020 | Conference Paper | LibreCat-ID: 3583
Optimal and Greedy Heuristic Approaches for Scheduling and Mapping of Hardware Tasks to Reconfigurable Computing Devices
Z. Guetttatfi, P. Kaufmann, M. Platzner, in: Proceedings of the International Workshop on Applied Reconfigurable Computing (ARC), 2020.
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2019 | Preprint | LibreCat-ID: 16853
Jump Search: A Fast Technique for the Synthesis of Approximate Circuits
L.M. Witschen, H. Ghasemzadeh Mohammadi, M. Artmann, M. Platzner, Fourth Workshop on Approximate Computing (AxC 2019) (n.d.).
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2019 | Conference Paper | LibreCat-ID: 10577
Jump Search: A Fast Technique for the Synthesis of Approximate Circuits
L.M. Witschen, H. Ghasemzadeh Mohammadi, M. Artmann, M. Platzner, in: Proceedings of the 2019 on Great Lakes Symposium on VLSI  - GLSVLSI ’19, ACM, New York, NY, USA, 2019.
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2019 | Conference Paper | LibreCat-ID: 15422
Optimization of Application-specific L1 Cache Translation Functions of the LEON3 Processor
N. Ho, P. Kaufmann, M. Platzner, in: World Congress on Nature and Biologically Inspired Computing (NaBIC), Springer, 2019.
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2019 | Conference Paper | LibreCat-ID: 9913
Proof-Carrying Hardware Versus the Stealthy Malicious LUT Hardware Trojan
Q.A. Ahmed, T. Wiersema, M. Platzner, in: C. Hochberger, B. Nelson, A. Koch, R. Woods, P. Diniz (Eds.), Applied Reconfigurable Computing, Springer International Publishing, Cham, 2019, pp. 127–136.
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2018 | Conference Paper | LibreCat-ID: 3373
An FPGA/HMC-Based Accelerator for Resolution Proof Checking
T. Hansmeier, M. Platzner, D. Andrews, in: ARC 2018: Applied Reconfigurable Computing. Architectures, Tools, and Applications, Springer International Publishing, 2018, pp. 153–165.
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2018 | Conference Paper | LibreCat-ID: 10598
An MCTS-based Framework for Synthesis of Approximate Circuits
M. Awais, H. Ghasemzadeh Mohammadi, M. Platzner, in: 26th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), 2018, pp. 219–224.
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2018 | Preprint | LibreCat-ID: 1165
Making the Case for Proof-carrying Approximate Circuits
L.M. Witschen, T. Wiersema, M. Platzner, 4th Workshop On Approximate Computing (WAPCO 2018) (2018).
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2018 | Preprint | LibreCat-ID: 3586
CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation
L.M. Witschen, T. Wiersema, H. Ghasemzadeh Mohammadi, M. Awais, M. Platzner, Third Workshop on Approximate Computing (AxC 2018) (n.d.).
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2018 | Conference Paper | LibreCat-ID: 5547
A Highly Accurate Energy Model for Task Execution on Heterogeneous Compute Nodes
A. Lösch, M. Platzner, in: 2018 IEEE 29th International Conference on Application-Specific Systems, Architectures and Processors (ASAP), IEEE, 2018.
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2018 | Conference Paper | LibreCat-ID: 3362
Ampehre: An Open Source Measurement Framework for Heterogeneous Compute Nodes
A. Lösch, A. Wiens, M. Platzner, in: Proceedings of the International Conference on Architecture of Computing Systems (ARCS), Springer International Publishing, Cham, 2018, pp. 73–84.
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2017 | Conference Paper | LibreCat-ID: 14893
I-Codesign: A Codesign Methodology for Reconfigurable Embedded Systems
I. Ghribi, R.B. Abdallah, M. Khalgui, M. Platzner, in: Communications in Computer and Information Science, Springer , Cham, 2017.
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2017 | Conference Paper | LibreCat-ID: 10762
An Empirical Study on the Parametrization of Cartesian Genetic Programming
P. Kaufmann, R. Kalkreuth, in: Genetic and Evolutionary Computation (GECCO), Compendium, ACM, 2017.
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2017 | Conference Paper | LibreCat-ID: 10780
Computational self-awareness as design approach for visual sensor nodes
Z. Guettatfi, P. Hübner, M. Platzner, B. Rinner, in: 12th International Symposium on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC), 2017, pp. 1–8.
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2017 | Conference Paper | LibreCat-ID: 10760
Parametrizing Cartesian Genetic Programming: An Empirical Study
P. Kaufmann, R. Kalkreuth, in: KI 2017: Advances in Artificial Intelligence: 40th Annual German Conference on AI, Springer International Publishing, 2017.
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2017 | Conference Paper | LibreCat-ID: 10676
Evolvable caches: Optimization of reconfigurable cache mappings for a LEON3/Linux-based multi-core processor
N. Ho, P. Kaufmann, M. Platzner, in: 2017 International Conference on Field Programmable Technology (ICFPT), 2017, pp. 215–218.
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2017 | Conference Paper | LibreCat-ID: 10761
Evaluation Methodology for Complex Non-deterministic Functions: A Case Study in Metaheuristic Optimization of Caches
P. Kaufmann, N. Ho, M. Platzner, in: Adaptive Hardware and Systems (AHS), IEEE, 2017.
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2017 | Conference Paper | LibreCat-ID: 10672
Accurate Private/Shared Classification of Memory Accesses: a Run-time Analysis System for the LEON3 Multi-core Processor
N. Ho, I.I. Ashraf, P. Kaufmann, M. Platzner, in: Proc. Design, Automation and Test in Europe Conf. (DATE), 2017.
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2017 | Conference Paper | LibreCat-ID: 10630
A Zynq-based dynamically reconfigurable high density myoelectric prosthesis controller
A. Boschmann, G. Thombansen, L.M. Witschen, A. Wiens, M. Platzner, in: Design, Automation and Test in Europe (DATE), 2017.
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2017 | Conference Paper | LibreCat-ID: 65
reMinMin: A Novel Static Energy-Centric List Scheduling Approach Based on Real Measurements
A. Lösch, M. Platzner, in: Proceedings of the 28th Annual IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP), 2017.
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2016 | Conference Paper | LibreCat-ID: 168
Performance-centric scheduling with task migration for a heterogeneous compute node in the data center
A. Lösch, T. Beisel, T. Kenter, C. Plessl, M. Platzner, in: Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), EDA Consortium / IEEE, 2016, pp. 912–917.
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2016 | Conference Paper | LibreCat-ID: 15873
FPGA-based acceleration of high density myoelectric signal processing
A. Boschmann, A. Agne, L.M. Witschen, G. Thombansen, F. Kraus, M. Platzner, in: 2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2016.
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2016 | Conference Paper | LibreCat-ID: 10631
A novel immersive augmented reality system for prosthesis training and assessment
A. Boschmann, S. Dosen, A. Werner, A. Raies, D. Farina, in: Proc. IEEE Int. Conf. Biomed. Health Informatics (BHI), 2016.
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2016 | Conference Paper | LibreCat-ID: 10766
RCo-Design: New Visual Environment for Reconfigurable Embedded Systems
I. Ghribi, R. Ben Abdallah, M. Khalgui, M. Platzner, in: Proceedings of the 30th European Simulation and Modelling Conference (ESM), 2016.
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2016 | Conference Paper | LibreCat-ID: 10622
Boolean Difference Based Reliability Evaluation of Fault Tolerant Circuit Structures on FPGAs
J. Anwer, M. Platzner, in: Euromicro Conference on Digital System Design (DSD), 2016.
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2016 | Conference Paper | LibreCat-ID: 10768
New Co-design Methodology for Real-time Embedded Systems
I. Ghribi, R. Ben Abdallah, M. Khalgui, M. Platzner, in: Proceedings of the 11th International Conference on Software Engineering and Applications (ICSOFT-EA), 2016, pp. 185–195.
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2016 | Conference Paper | LibreCat-ID: 10712
Thread Shadowing: On the Effectiveness of Error Detection at the Hardware Thread Level
S. Meisner, M. Platzner, in: Reconfigurable Computing and FPGAs (ReConFig), 2016 International Conference On, 2016, pp. 1–8.
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2016 | Conference Paper | LibreCat-ID: 13151
Using Deep Convolutional Neural Networks in Monte Carlo Tree Search
T. Graf, M. Platzner, in: Computer and Games, 2016.
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2016 | Conference Paper | LibreCat-ID: 13152
Monte-Carlo Simulation Balancing Revisited
T. Graf, M. Platzner, in: IEEE Computational Intelligence and Games, 2016.
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2016 | Conference Paper | LibreCat-ID: 132
Verifying Worst-Case Completion Times for Reconfigurable Hardware Modules using Proof-Carrying Hardware
T. Wiersema, M. Platzner, in: Proceedings of the 11th International Symposium on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC 2016), 2016, pp. 1--8.
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2016 | Conference Paper | LibreCat-ID: 5812
FPGA-based acceleration of high density myoelectric signal processing
A. Boschmann, A. Agne, L. Witschen, G. Thombansen, F. Kraus, M. Platzner, in: 2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig), IEEE, 2016.
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2015 | Conference Paper | LibreCat-ID: 10693
Generator Start-up Sequences Optimization for Network Restoration Using Genetic Algorithm and Simulated Annealing
P. Kaufmann, C. Shen, in: Genetic and Evolutionary Computation (GECCO), ACM, 2015, pp. 409–416.
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2015 | Conference Paper | LibreCat-ID: 10771
On the design of a fault tolerant ripple-carry adder with controllable-polarity transistors
H. Ghasemzadeh Mohammadi, P.-E. Gaillardon, J. Zhang, G. De Micheli, E. Sanchez, M.S. Reorda, in: 2015 IEEE Computer Society Annual Symposium on VLSI, IEEE, 2015, pp. 491–496.
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2015 | Conference Paper | LibreCat-ID: 10772
Fault modeling in controllable polarity silicon nanowire circuits
H. Ghasemzadeh Mohammadi, P.-E. Gaillardon, G. De Micheli, in: Proceedings of the 2015 Design, Automation & Test in Europe Conference \& Exhibition, EDA Consortium, 2015, pp. 453–458.
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2015 | Conference Paper | LibreCat-ID: 10779
Over effective hard real-time hardware tasks scheduling and allocation
Z. Guettatfi, O. Kermia, A. Khouas, in: 25th International Conference on Field Programmable Logic and Applications (FPL), Imperial College, 2015.
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2015 | Conference Paper | LibreCat-ID: 10673
Microarchitectural optimization by means of reconfigurable and evolvable cache mappings
N. Ho, A.F. Ahmed, P. Kaufmann, M. Platzner, in: Proc. NASA/ESA Conf. Adaptive Hardware and Systems (AHS), 2015, pp. 1–7.
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2015 | Conference Paper | LibreCat-ID: 10765
Significant papers from the first 25 years of the FPL conference
P. H.W. Leong, H. Amano, J. Anderson, K. Bertels, J. M.P. Cardoso, O. Diessel, G. Gogniat, M. Hutton, J. Lee, W. Luk, P. Lysaght, M. Platzner, V. K. Prasanna, T. Rissa, C. Silvano, H. So, Y. Wang, in: Proceedings of the 25th International Conference on Field Programmable Logic and Applications (FPL), Imperial College, 2015, pp. 1–3.
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2015 | Conference Paper | LibreCat-ID: 10767
New Codesign Solutions for Modelling and Partitioning of Probabilistic Reconfigurable Embedded Software
I. Ghribi, R. Ben Abdallah, M. Khalgui, M. Platzner, in: Proceedings of the 29th European Simulation and Modelling Conference (ESM), 2015.
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2015 | Conference Paper | LibreCat-ID: 10711
Comparison of thread signatures for error detection in hybrid multi-cores
S. Meisner, M. Platzner, in: Field Programmable Technology (FPT), 2015 International Conference On, 2015, pp. 212–215.
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2015 | Conference Paper | LibreCat-ID: 13153
Adaptive Playouts in Monte-Carlo Tree Search with Policy-Gradient Reinforcement Learning
T. Graf, M. Platzner, in: Advances in Computer Games: 14th International Conference, ACG 2015, Leiden, The Netherlands, July 1-3, 2015, Revised Selected Papers, Springer International Publishing, 2015, pp. 1–11.
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2015 | Conference Paper | LibreCat-ID: 1773
Improving Packet Processing Performance in the ATLAS FELIX Project – Analysis and Optimization of a Memory-Bounded Algorithm
J. Schumacher, J. T. Anderson, A. Borga, H. Boterenbrood, H. Chen, K. Chen, G. Drake, D. Francis, B. Gorini, F. Lanni, G. Lehmann-Miotto, L. Levinson, J. Narevicius, C. Plessl, A. Roich, S. Ryu, F. P. Schreuder, W. Vandelli, J. Vermeulen, J. Zhang, in: Proc. Int. Conf. on Distributed Event-Based Systems (DEBS), ACM, 2015.
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2015 | Conference Paper | LibreCat-ID: 238
Transparent offloading of computational hotspots from binary code to Xeon Phi
M. Damschen, H. Riebler, G.F. Vaz, C. Plessl, in: Proceedings of the 2015 Conference on Design, Automation and Test in Europe (DATE), EDA Consortium / IEEE, 2015, pp. 1078–1083.
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2015 | Conference Paper | LibreCat-ID: 303
Easy-to-Use On-The-Fly Binary Program Acceleration on Many-Cores
M. Damschen, C. Plessl, in: Proceedings of the 5th International Workshop on Adaptive Self-Tuning Computing Systems (ADAPT), 2015.
LibreCat | Files available | arXiv
 

2015 | Conference Paper | LibreCat-ID: 269
On-The-Fly Verification of Reconfigurable Image Processing Modules based on a Proof-Carrying Hardware Approach
T. Wiersema, S. Wu, M. Platzner, in: Proceedings of the International Symposium in Reconfigurable Computing (ARC), 2015, pp. 365--372.
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2014 | Conference Paper | LibreCat-ID: 10654
Lookup Table Partial Reconfiguration for an Evolvable Hardware Classifier System
K. Glette, P. Kaufmann, in: IEEE Congress on Evolutionary Computation (CEC), 2014.
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2014 | Conference Paper | LibreCat-ID: 10739
A New Distribution Network Reconfiguration and Restoration Path Selection Algorithm
C. Shen, P. Kaufmann, M. Braun, in: Power Systems Computation Conference (PSCC), IEEE, 2014.
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2014 | Conference Paper | LibreCat-ID: 10738
Optimizing the Generator Start-up Sequence After a Power System Blackout
C. Shen, P. Kaufmann, M. Braun, in: IEEE Power and Energy Society General Meeting (IEEE GM), 2014.
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