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10069 Publications

1998 | Conference Paper | LibreCat-ID: 8288
S. Sauer and O. Zukunft, “Event Processing in Mobile and Active Database Systems Using Broadcasts,” in Proceedings of the 9th International Workshop on Database and Expert Systems Applications (DEXA 1998), Vienna (Austria), 1998, pp. 420–426.

1998 | Journal Article | LibreCat-ID: 8466
H.-H. Kremer and U. Schwetz, “Selbstgesteuerte Weiterbildung von Ausbildern. Eine betriebspädagogische Studie,” Kölner Zeitschrift für Wirtschaft und Pädagogik, no. 25, pp. 189–193, 1998.

1998 | Journal Article | LibreCat-ID: 877
A. Baratloo, M. Karaul, H. Karl, and Z. M. Kedem, “An infrastructure for network computing with Java applets,” Concurrency -- Practice and Experience, no. 11–13, pp. 1029--1041, 1998.
LibreCat | DOI

1998 | Conference Paper | LibreCat-ID: 16892
C. Lenz, J. D. Stüwe, and G. Domik-Kienegger, “Integration of GIS and VRML,” presented at the Computer Graphics Internation 98, Hannover, 1998.

1998 | Journal Article | LibreCat-ID: 10193
G. Brinkmann and E. Steffen, “Snarks and reducibility,” Ars Combinatoria, vol. 50, pp. 292–296, 1998.

1998 | Conference Paper | LibreCat-ID: 1012
H. Karl and M. Werner, “An optimal checkpointing interval for real-time systems,” in Proc. Intl. Conf. Parallel and Distributed Processing Techniques and Applications, 1998, pp. 604--612.

1998 | Conference Paper | LibreCat-ID: 11730
P. Beyerlein et al., “Automatic Transcription of English Broadcast News,” in DARPA Broadcast News Transcription and Understanding Workshop, Landsdowne, 1998.
LibreCat | Download (ext.)

1998 | Book Chapter | LibreCat-ID: 13060
S. Hellebrand, H.-J. Wunderlich, and A. Hertwig, “Mixed-Mode BIST Using Embedded Processors,” in Mixed-Mode BIST Using Embedded Processors, In: M. Nicolaidis, Y. Zorian, D. K. Pradhan (Eds.): On-Line Testing for VLSI, Boston: Kluwer Academic Publishers 1998: {Kluwer Academic Publishers}, 1998.

1998 | Misc | LibreCat-ID: 13091
V. N. Yarmolik, S. Hellebrand, and H.-J. Wunderlich, Efficient Consistency Checking for Embedded Memories. 5th IEEE International Test Synthesis Workshop, Santa Barbara, CA, USA, 1998.

1998 | Misc | LibreCat-ID: 13464
M. Platzner, B. Rinner, and R. Weiss, A Distributed Computer Architecture for Fast Qualitative Simulation . Texas Instruments, The Elite Yearbook 1997 - Digital Signal Processing Solutions from Europe’s leading Universities, 1998, pp. 106–107.

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