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12545 Publications


1995 | Conference Paper | LibreCat-ID: 8267
Corradini, Andrea, and Reiko Heckel. “A Compositional Approach to Structuring and Refinement of Typed Graph Grammars.” Proceedings of the Joint COMPUGRAPH/SEMAGRAPH Workshop on Graph Rewriting and Computation (SEGRAGRA 1995), Volterra (Italy), vol. 2, Elsevier, 1995, pp. 46–55.
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1995 | Journal Article | LibreCat-ID: 16542
Dellnitz, M., and I. Melbourne. “A Note on the Shadowing Lemma and Symmetric Periodic Points.” Nonlinearity, 1995, pp. 1067–75, doi:10.1088/0951-7715/8/6/010.
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1995 | Conference Paper | LibreCat-ID: 17482
Czumaj, Artur, et al. “Simulating Shared Memory in Real Time: On the Computation Power of Reconfigurable Meshes.” Proceedings of the 2nd IEEE Workshop on Reconfigurable Architectures, 1995, pp. 46--59.
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1995 | Journal Article | LibreCat-ID: 16566
Breslauer, Dany, et al. “Transforming Comparison Model Lower Bounds to the Parallel-Random-Access-Machine.” Information Processing Letters, 1995, pp. 103–10, doi:10.1016/s0020-0190(97)00032-x.
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1995 | Book Chapter | LibreCat-ID: 19414
Eke, Norbert Otto. “Zeit/Räume – Aspekte der Zeiterfahrung bei Heiner Müller.” Heiner Müller – Rückblicke, Perspektiven. Vorträge des Pariser Kolloquiums 1993, edited by Theo Buck et al., Lang, 1995, pp. 131–52.
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1995 | Dissertation | LibreCat-ID: 19630
Wachsmann, Alf. Eine Bibliothek von Basisdiensten Für Parallelrechner: Routing, Synchronisation, Gemeinsamer Speicher. 1995.
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1995 | Dissertation | LibreCat-ID: 19623
Stemann, Volker. Contention Resolution in Hashing Based Shared Memory Simulations. 1995.
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1995 | Conference Paper | LibreCat-ID: 2187
Meyer auf der Heide, Friedhelm, and Christian Scheideler. “Routing with Bounded Buffers and Hot-Potato Routing in Vertex-Symmetric Networks.” ESA, 1995, pp. 341--354, doi:10.1007/3-540-60313-1_154.
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1994 | Conference Paper | LibreCat-ID: 13013
Hellebrand, Sybille, and Hans-Joachim Wunderlich. “Synthesis of Self-Testable Controllers.” {European Design and Test Conference (EDAC/ETC/EUROASIC)}, {IEEE (Comput. Soc. Press)}, 1994, pp. 580–85, doi:10.1109/edtc.1994.326815.
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1994 | Report | LibreCat-ID: 13025
Hellebrand, Sybille, et al. Chip Level Test Planning for Controlling the Tradeoff between Hardware Overhead and Test Time. 1994.
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