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8668 Publications


1998 | Conference Paper | LibreCat-ID: 8289
H. Ehrig, R. Heckel, M. Llabrés, and F. Orejas, “Construction and Characterisation of Double-Pullback Graph Transitions,” in Proceedings of the 6th International Workshop on Theory and Application of Graph Transformation (TAGT 1998), Paderborn (Germany), 1998.
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1998 | Journal Article | LibreCat-ID: 8467
H.-H. Kremer and K. Wilbers, “Virtuelles Seminar ‘Wipäd Köln - München’ - Konzeption und erste Erfahrungen,” Kölner Zeitschrift für Wirtschaft und Pädagogik, no. 25, pp. 99–117, 1998.
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1998 | Journal Article | LibreCat-ID: 878
H. Karl, M. Werner, and L. Küttner, “Experimental investigation of message latencies in the Totem protocol in the Presence of faults,” IEEE Proceedings -- Software, no. 6, pp. 219--227, 1998.
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1998 | Conference Paper | LibreCat-ID: 8905
T. Hemsel, J. Krome, W. Littmann, and J. Wallaschek, “Modellierung piezoelektrischer Stapel- und Vielschichtaktoren für dynamischen Betrieb,” in Proceedings 2. Polnisch-Deutscher Workshop “Werkzeuge der Mechatronik,” 1998.
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1998 | Book Chapter | LibreCat-ID: 3361
T. Gries and S. Jungblut, “The Dynamics of Growth and Employment in a Two-Sector Model of Job Matching,” in Operations Research Proceedings 1997, Springer, 1998, pp. 241–246.
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1998 | Book Chapter | LibreCat-ID: 3359
T. Gries and H. Meyer, “Information Technologies, Endogenous Human Capital Depreciation and Unemployment,” in Economic Aspects of Digital Information Technology, DUV, T. Gries and L. Suhl, Eds. 1998.
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1998 | Journal Article | LibreCat-ID: 10193
G. Brinkmann and E. Steffen, “Snarks and reducibility,” Ars Combinatoria, vol. 50, pp. 292–296, 1998.
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1998 | Conference Paper | LibreCat-ID: 13008
S. Hellebrand, H.-J. Wunderlich, and V. N. Yarmolik, “Self-Adjusting Output Data Compression: An Efficient BIST Technique for RAMs,” in {IEEE Design, Automation and Test in Europe (DATE’98)}, 1998, pp. 173–179.
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1998 | Book Chapter | LibreCat-ID: 13060
S. Hellebrand, H.-J. Wunderlich, and A. Hertwig, “Mixed-Mode BIST Using Embedded Processors,” in Mixed-Mode BIST Using Embedded Processors, In: M. Nicolaidis, Y. Zorian, D. K. Pradhan (Eds.): On-Line Testing for VLSI, Boston: Kluwer Academic Publishers 1998: {Kluwer Academic Publishers}, 1998.
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1998 | Misc | LibreCat-ID: 13091
V. N. Yarmolik, S. Hellebrand, and H.-J. Wunderlich, Efficient Consistency Checking for Embedded Memories. 5th IEEE International Test Synthesis Workshop, Santa Barbara, CA, USA, 1998.
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