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228 Publications
2011 | Conference Paper | LibreCat-ID: 13644
Henkel, J., Hedrich, L., Herkersdorf, A., Kapitza, R., Lohmann, D., Marwedel, P., … Härtig, H. (2011). Design and architectures for dependable embedded systems. In Proceedings of the seventh IEEE/ACM/IFIP International Conference on Hardware/software Codesign and system synthesis - CODES+ISSS ’11. https://doi.org/10.1145/2039370.2039384
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2011 | Conference Paper | LibreCat-ID: 2194
Meyer, B., Plessl, C., & Förstner, J. (2011). Transformation of scientific algorithms to parallel computing code: subdomain support in a MPI-multi-GPU backend. Symp. on Application Accelerators in High Performance Computing (SAAHPC), 60–63. https://doi.org/10.1109/SAAHPC.2011.12
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2011 | Conference Paper | LibreCat-ID: 2193
Beisel, T., Wiersema, T., Plessl, C., & Brinkmann, A. (2011). Cooperative multitasking for heterogeneous accelerators in the Linux Completely Fair Scheduler. Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), 223–226. https://doi.org/10.1109/ASAP.2011.6043273
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2011 | Conference Paper | LibreCat-ID: 656
Happe, M., Agne, A., & Plessl, C. (2011). Measuring and Predicting Temperature Distributions on FPGAs at Run-Time. Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs (ReConFig), 55–60. https://doi.org/10.1109/ReConFig.2011.59
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2011 | Conference Paper | LibreCat-ID: 2200
Kenter, T., Platzner, M., Plessl, C., & Kauschke, M. (2011). Performance Estimation Framework for Automated Exploration of CPU-Accelerator Architectures. Proc. Int. Symp. on Field-Programmable Gate Arrays (FPGA), 177–180. https://doi.org/10.1145/1950413.1950448
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2011 | Conference Paper | LibreCat-ID: 2198
Grad, M., & Plessl, C. (2011). Just-in-time Instruction Set Extension – Feasibility and Limitations for an FPGA-based Reconfigurable ASIP Architecture. Proc. Reconfigurable Architectures Workshop (RAW), 278–285. https://doi.org/10.1109/IPDPS.2011.153
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2010 | Conference Paper | LibreCat-ID: 10683
Kaufmann, P., Englehart, K., & Platzner, M. (2010). Fluctuating EMG Signals: Investigating Long-term Effects of Pattern Matching Algorithms. In International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC) (pp. 6357–6360). IEEE.
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2010 | Conference Paper | LibreCat-ID: 10686
Kaufmann, P., Knieper, T., & Platzner, M. (2010). A Novel Hybrid Evolutionary Strategy and its Periodization with Multi-objective Genetic Optimizers. In IEEE World Congress on Computational Intelligence (WCCI), Congress on Evolutionary Computation (CEC) (pp. 541–548). IEEE.
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2010 | Conference Paper | LibreCat-ID: 10699
Knieper, T., Kaufmann, P., Glette, K., Platzner, M., & Torresen, J. (2010). Coping with Resource Fluctuations: The Run-time Reconfigurable Functional Unit Row Classifier Architecture. In IEEE Intl. Conf. on Evolvable Systems (ICES) (Vol. 6274, pp. 250–261). Springer.
LibreCat
2010 | Conference Paper | LibreCat-ID: 10776
Khatir, M., Ghasemzadeh Mohammadi, H., & Ejlali, A. (2010). Sub-threshold charge recovery circuits. In Computer Design (ICCD), 2010 IEEE International Conference on (pp. 138–144). IEEE. https://doi.org/10.1109/ICCD.2010.5647815
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2010 | Conference Paper | LibreCat-ID: 13640
Giefers, H., & Platzner, M. (2010). A Triple Hybrid Interconnect for Many-Cores: Reconfigurable Mesh, NoC and Barrier. In Proceedings of the 20th International Conference on Field Programmable Logic and Applications (FPL). IEEE.
LibreCat
2010 | Conference Paper | LibreCat-ID: 13641
Schäfer, W., Birattari, M., Blömer, J., Dorigo, M., Engels, G., O’Grady, R., … Trächtler, A. (2010). Engineering Self-Coordinating Software Intensive Systems. In Proceedings of the Foundations of Software Engineering (FSE) and NITR & D/SPD Working Conference on the Future of Software Engineering Research (FoSER) (pp. 321–324).
LibreCat
2010 | Conference Paper | LibreCat-ID: 13642
Giefers, H., & Platzner, M. (2010). A Self-Reconfigurable Lightweight Interconnect for Scalable Processor Fabrics. In Proceedings of the 10th International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press.
LibreCat
2010 | Conference Paper | LibreCat-ID: 2223
Lübbers, E., Platzner, M., Plessl, C., Keller, A., & Plattner, B. (2010). Towards Adaptive Networking for Embedded Devices based on Reconfigurable Hardware. Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 225–231.
LibreCat
2010 | Conference Paper | LibreCat-ID: 2216
Grad, M., & Plessl, C. (2010). Pruning the Design Space for Just-In-Time Processor Customization. Proc. Int. Conf. on ReConFigurable Computing and FPGAs (ReConFig), 67–72. https://doi.org/10.1109/ReConFig.2010.19
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2010 | Conference Paper | LibreCat-ID: 2224
Grad, M., & Plessl, C. (2010). An Open Source Circuit Library with Benchmarking Facilities. Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 144–150.
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2010 | Conference Paper | LibreCat-ID: 2220
Andrews, D., & Plessl, C. (2010). Configurable Processor Architectures: History and Trends. Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA), 165.
LibreCat
2010 | Conference (Editor) | LibreCat-ID: 2222
Plaks, T. P., Andrews, D., DeMara, R., Lam, H., Lee, J., Plessl, C., & Stitt, G. (Eds.). (2010). Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA). CSREA Press.
LibreCat
2010 | Conference Paper | LibreCat-ID: 2226
Beisel, T., Niekamp, M., & Plessl, C. (2010). Using Shared Library Interposing for Transparent Acceleration in Systems with Heterogeneous Hardware Accelerators. Proc. Int. Conf. on Application-Specific Systems, Architectures, and Processors (ASAP), 65–72. https://doi.org/10.1109/ASAP.2010.5540798
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2010 | Conference Paper | LibreCat-ID: 2206
Keller, A., Plattner, B., Lübbers, E., Platzner, M., & Plessl, C. (2010). Reconfigurable Nodes for Future Networks. Proc. IEEE Globecom Workshop on Network of the Future (FutureNet), 372–376. https://doi.org/10.1109/GLOCOMW.2010.5700341
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