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70 Publications
2015 | Mastersthesis | LibreCat-ID: 10671
Computer Vision basierte Klassifikation von HD EMG Signalen
C. Haupt, Computer Vision Basierte Klassifikation von HD EMG Signalen, Paderborn University, 2015.
LibreCat
C. Haupt, Computer Vision Basierte Klassifikation von HD EMG Signalen, Paderborn University, 2015.
2015 | Mastersthesis | LibreCat-ID: 10726
Acceleration of Artificial Neural Networks on a Zynq Platform
T. Posewsky, Acceleration of Artificial Neural Networks on a Zynq Platform, Paderborn University, 2015.
LibreCat
T. Posewsky, Acceleration of Artificial Neural Networks on a Zynq Platform, Paderborn University, 2015.
2014 | Mastersthesis | LibreCat-ID: 10640
A Generalized Loop Accelerator Implemented as a Coarse-Grained Array
M. Brand, A Generalized Loop Accelerator Implemented as a Coarse-Grained Array, Paderborn University, 2014.
LibreCat
M. Brand, A Generalized Loop Accelerator Implemented as a Coarse-Grained Array, Paderborn University, 2014.
2014 | Mastersthesis | LibreCat-ID: 10645
Easy-to-use-on-the-fly binary program acceleration on many-cores
M. Damschen, Easy-to-Use-on-the-Fly Binary Program Acceleration on Many-Cores, Paderborn University, 2014.
LibreCat
M. Damschen, Easy-to-Use-on-the-Fly Binary Program Acceleration on Many-Cores, Paderborn University, 2014.
2014 | Mastersthesis | LibreCat-ID: 10701
Hardware Acceleration of Mechatronic Controllers on a Zynq Platform FPGA
B. Koch, Hardware Acceleration of Mechatronic Controllers on a Zynq Platform FPGA, Paderborn University, 2014.
LibreCat
B. Koch, Hardware Acceleration of Mechatronic Controllers on a Zynq Platform FPGA, Paderborn University, 2014.
2014 | Mastersthesis | LibreCat-ID: 10715
Advanced AES-key recovery from decayed RAM using multi-threading and FPGAs
R. Mittendorf, Advanced AES-Key Recovery from Decayed RAM Using Multi-Threading and FPGAs, Paderborn University, 2014.
LibreCat
R. Mittendorf, Advanced AES-Key Recovery from Decayed RAM Using Multi-Threading and FPGAs, Paderborn University, 2014.
2014 | Mastersthesis | LibreCat-ID: 10744
Multithreaded Parallelization of Mechatronic Controllers on a Zynq Platform FPGA
S. Surmund, Multithreaded Parallelization of Mechatronic Controllers on a Zynq Platform FPGA, Paderborn University, 2014.
LibreCat
S. Surmund, Multithreaded Parallelization of Mechatronic Controllers on a Zynq Platform FPGA, Paderborn University, 2014.
2013 | Mastersthesis | LibreCat-ID: 10730
Identifikation und Wiederherstellung von kryptographischen Schlüsseln mit FPGAs
H. Riebler, Identifikation Und Wiederherstellung von Kryptographischen Schlüsseln Mit FPGAs, Paderborn University, 2013.
LibreCat
H. Riebler, Identifikation Und Wiederherstellung von Kryptographischen Schlüsseln Mit FPGAs, Paderborn University, 2013.
2012 | Mastersthesis | LibreCat-ID: 10650
Design and Implementation of a Nanophotonics Simulation Personality for the Convey HC-1 Hybrid Core Computer
D. Dridger, Design and Implementation of a Nanophotonics Simulation Personality for the Convey HC-1 Hybrid Core Computer, Paderborn University, 2012.
LibreCat
D. Dridger, Design and Implementation of a Nanophotonics Simulation Personality for the Convey HC-1 Hybrid Core Computer, Paderborn University, 2012.
2012 | Mastersthesis | LibreCat-ID: 10658
Adaptive Playouts in der Monte-Carlo Spielbaumsuche am Anwendungsfall Go
T. Graf, Adaptive Playouts in Der Monte-Carlo Spielbaumsuche Am Anwendungsfall Go, Paderborn University, 2012.
LibreCat
T. Graf, Adaptive Playouts in Der Monte-Carlo Spielbaumsuche Am Anwendungsfall Go, Paderborn University, 2012.
2012 | Mastersthesis | LibreCat-ID: 10754
Analysis of Pattern Based Model Design and Learning in Computer-Go
M. Wistuba, Analysis of Pattern Based Model Design and Learning in Computer-Go, Paderborn University, 2012.
LibreCat
M. Wistuba, Analysis of Pattern Based Model Design and Learning in Computer-Go, Paderborn University, 2012.
2011 | Mastersthesis | LibreCat-ID: 10736
Analysis of Algorithmic Approaches for Temporal Partitioning
A. Schwabe, Analysis of Algorithmic Approaches for Temporal Partitioning, Paderborn University, 2011.
LibreCat
A. Schwabe, Analysis of Algorithmic Approaches for Temporal Partitioning, Paderborn University, 2011.
2011 | Mastersthesis | LibreCat-ID: 10750
User Space Scheduling for Heterogeneous Systems
D. Welp, User Space Scheduling for Heterogeneous Systems, Paderborn University, 2011.
LibreCat
D. Welp, User Space Scheduling for Heterogeneous Systems, Paderborn University, 2011.
2010 | Mastersthesis | LibreCat-ID: 10614
Virtuelle Speicherverwaltung für Hardware Threads in Rekonfigurierbaren Systemen
A. Agne, Virtuelle Speicherverwaltung Für Hardware Threads in Rekonfigurierbaren Systemen, Paderborn University, 2010.
LibreCat
A. Agne, Virtuelle Speicherverwaltung Für Hardware Threads in Rekonfigurierbaren Systemen, Paderborn University, 2010.
2010 | Mastersthesis | LibreCat-ID: 10629
EMG-basierte Ganganalyse
A. Boschmann, EMG-Basierte Ganganalyse, Paderborn University, 2010.
LibreCat
A. Boschmann, EMG-Basierte Ganganalyse, Paderborn University, 2010.
2010 | Mastersthesis | LibreCat-ID: 10642
Evolvable Cache Controller
D. Breitlauch, Evolvable Cache Controller, Paderborn University, 2010.
LibreCat
D. Breitlauch, Evolvable Cache Controller, Paderborn University, 2010.
2010 | Mastersthesis | LibreCat-ID: 10697
Hybridization of Global Multi-Objective and Local Search Techniques
T. Knieper, Hybridization of Global Multi-Objective and Local Search Techniques, Paderborn University, 2010.
LibreCat
T. Knieper, Hybridization of Global Multi-Objective and Local Search Techniques, Paderborn University, 2010.
2010 | Mastersthesis | LibreCat-ID: 10710
FPGA/CPU Multicore-Plattform für ReconOS/eCos
R. Meiche, FPGA/CPU Multicore-Plattform Für ReconOS/ECos, Paderborn University, 2010.
LibreCat
R. Meiche, FPGA/CPU Multicore-Plattform Für ReconOS/ECos, Paderborn University, 2010.
2010 | Mastersthesis | LibreCat-ID: 10717
Transparente Hardwarebeschleunigung durch Shared Library Interposing
M. Niekamp, Transparente Hardwarebeschleunigung Durch Shared Library Interposing, Paderborn University, 2010.
LibreCat
M. Niekamp, Transparente Hardwarebeschleunigung Durch Shared Library Interposing, Paderborn University, 2010.
2010 | Mastersthesis | LibreCat-ID: 10731
A Token-Ring Network-On-Chip for Message Passing in ReconOS
B. Runde, A Token-Ring Network-On-Chip for Message Passing in ReconOS, Paderborn University, 2010.
LibreCat
B. Runde, A Token-Ring Network-On-Chip for Message Passing in ReconOS, Paderborn University, 2010.