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5 Publications


2024 | Conference Paper | LibreCat-ID: 56605
J.-O. Opdenhövel, C. Alt, C. Plessl, and T. Kenter, “StencilStream: A SYCL-based Stencil Simulation Framework Targeting FPGAs,” 2024, doi: 10.1109/fpl64840.2024.00023.
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2024 | Conference Paper | LibreCat-ID: 54312
M. Büttner, C. Alt, T. Kenter, H. Köstler, C. Plessl, and V. Aizinger, “Enabling Performance Portability for Shallow Water Equations on CPUs, GPUs, and FPGAs with SYCL,” 2024, doi: 10.1145/3659914.3659925.
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2024 | Conference Paper | LibreCat-ID: 60359
J. Plewinski, C. Alt, H. Köstler, and U. Rüde, “Performance analysis of the free surface lattice Boltzmann implementation in waLBerla,” in PAMM, 2024, vol. 24, no. 3, doi: 10.1002/pamm.202400196.
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2024 | Journal Article | LibreCat-ID: 60358
C. Alt et al., “A continuous benchmarking infrastructure for high-performance computing applications,” International Journal of Parallel, Emergent and Distributed Systems, vol. 39, no. 4, pp. 501–523, 2024, doi: 10.1080/17445760.2024.2360190.
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2023 | Book Chapter | LibreCat-ID: 46191
C. Alt et al., “Shallow Water DG Simulations on FPGAs: Design and Comparison of a Novel Code Generation Pipeline,” in Lecture Notes in Computer Science, Cham: Springer Nature Switzerland, 2023.
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