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3 Publications
2026 | Conference Paper | LibreCat-ID: 63758
K. A. Hannemann, L. Luchterhandt, W. Müller, M. Ulbricht, and L. Lu, “Redesigning the TETRISC Architecture for Scalable Rocket Chip Implementations,” presented at the 38. ITG / GMM / GI - Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen, Potsdam, 2026.
LibreCat
2026 | Conference Paper | LibreCat-ID: 65595
K. A. Hannemann, L. M. Luchterhandt, W. Müller, M. Ulbricht, L. Lu, and J. C. Scheytt, “TETRISC on Rocket Chip: A Scalable and Adaptive RISC-V Multicore Architecture,” presented at the 29. Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV 2026), Würzburg, 2026.
LibreCat
2025 | Conference Paper | LibreCat-ID: 58856
K. A. Hannemann, H. B. Bütün, W. Müller, and J. C. Scheytt, “Verilator and FireSim RTL Simulations on a HPC Cluster: A Comparative Case Study,” 2025.
LibreCat