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66 Publications
2012 | Journal Article | LibreCat-ID: 2108
Schumacher, T., Plessl, C., & Platzner, M. (2012). IMORC: An Infrastructure and Architecture Template for Implementing High-Performance Reconfigurable FPGA Accelerators. Microprocessors and Microsystems, 36(2), 110–126. https://doi.org/10.1016/j.micpro.2011.04.002
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2012 | Journal Article | LibreCat-ID: 2172
Thielemans, K., Tsoumpas, C., Mustafovic, S., Beisel, T., Aguiar, P., Dikaios, N., & W Jacobson, M. (2012). STIR: Software for Tomographic Image Reconstruction Release 2. Physics in Medicine and Biology, 57(4), 867–883. https://doi.org/10.1088/0031-9155/57/4/867
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2012 | Journal Article | LibreCat-ID: 2173
Redif, S., & Kasap, S. (2012). Parallel algorithm for computation of second-order sequential best rotations. Int. Journal of Electronics, 100(12), 1646–1651. https://doi.org/10.1080/00207217.2012.751343
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2012 | Journal Article | LibreCat-ID: 2174
Kasap, S., & Benkrid, K. (2012). Parallel Processor Design and Implementation for Molecular Dynamics Simulations on a FPGA Parallel Computer. Journal of Computers, 7(6), 1312–1328.
LibreCat
2012 | Journal Article | LibreCat-ID: 10685
Kaufmann, P., Glette, K., Platzner, M., & Torresen, J. (2012). Compensating Resource Fluctuations by Means of Evolvable Hardware: The Run-Time Reconfigurable Functional Unit Row Classifier Architecture. International Journal of Adaptive, Resilient and Autonomic Systems (IJARAS), 3(4), 17–31. https://doi.org/10.4018/jaras.2012100102
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2011 | Journal Article | LibreCat-ID: 2201
Schumacher, T., Süß, T., Plessl, C., & Platzner, M. (2011). FPGA Acceleration of Communication-bound Streaming Applications: Architecture Modeling and a 3D Image Compositing Case Study. Int. Journal of Recon- Figurable Computing (IJRC). https://doi.org/10.1155/2011/760954
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2010 | Journal Article | LibreCat-ID: 10694
Kebschull, U., Platzner, M., & Teich, J. (2010). Selected papers from the 18th International Conference on Field Programmable Logic and Applications, FPL 2008 (editorial). IET Computers Digital Techniques, 4(3), 157–158. https://doi.org/10.1049/iet-cdt.2010.9044
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2010 | Journal Article | LibreCat-ID: 10605
Drzevitzky, S., Kastens, U., & Platzner, M. (2010). Proof-Carrying Hardware: Concept and Prototype Tool Flow for Online Verification. International Journal of Reconfigurable Computing, 2010. https://doi.org/10.1155/2010/180242
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2009 | Journal Article | LibreCat-ID: 10703
Lübbers, E., & Platzner, M. (2009). ReconOS: Multithreaded Programming for Reconfigurable Computers. ACM Transactions on Embedded Computing Systems, 9(1), 8:1-8:33. https://doi.org/10.1145/1596532.1596540
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2007 | Journal Article | LibreCat-ID: 10646
Danne, K., Mühlenbernd, R., & Platzner, M. (2007). Server-based execution of periodic tasks on dynamically reconfigurable hardware. IET Computers Digital Techniques, 1(4), 295–302. https://doi.org/10.1049/iet-cdt:20060186
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2007 | Journal Article | LibreCat-ID: 10625
Bergmann, N., Platzner, M., & Teich, J. (2007). Dynamically Reconfigurable Architectures (editorial). {EURASIP} Journal on Embedded Systems, 2007, 1–2. https://doi.org/10.1155/2007/28405
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2005 | Journal Article | LibreCat-ID: 2412
Enzler, R., Plessl, C., & Platzner, M. (2005). System-level performance evaluation of reconfigurable processors. Microprocessors and Microsystems, 29(2–3), 63–73. https://doi.org/10.1016/j.micpro.2004.06.004
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2004 | Journal Article | LibreCat-ID: 10742
Steiger, C., Walder, H., & Platzner, M. (2004). Operating systems for reconfigurable embedded platforms: online scheduling of real-time tasks. {IEEE} Transactions on Computers, 53(11), 1393–1407. https://doi.org/10.1109/tc.2004.99
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2003 | Journal Article | LibreCat-ID: 2420
Plessl, C., & Platzner, M. (2003). Instance-Specific Accelerators for Minimum Covering. Journal of Supercomputing, 26(2), 109–129. https://doi.org/10.1023/a:1024443416592
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2003 | Journal Article | LibreCat-ID: 2419
Plessl, C., Enzler, R., Walder, H., Beutel, J., Platzner, M., Thiele, L., & Tröster, G. (2003). The Case for Reconfigurable Hardware in Wearable Computing. Personal and Ubiquitous Computing, 7(5), 299–308. https://doi.org/10.1007/s00779-003-0243-x
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2002 | Journal Article | LibreCat-ID: 10651
Eisenring, M., & Platzner, M. (2002). A Framework for Run-time Reconfigurable Systems. The Journal of Supercomputing, 21(2), 145–159. https://doi.org/10.1023/a:1013627403946
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2001 | Journal Article | LibreCat-ID: 10713
Mencer, O., Platzner, M., Morf, M., & J. Flynn, M. (2001). Object-oriented domain specific compilers for programming FPGAs. {IEEE} Transactions on Very Large Scale Integration ({VLSI}) Systems, 9(1), 205–210. https://doi.org/10.1109/92.920835
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2000 | Journal Article | LibreCat-ID: 6507
Platzner, M. (2000). Reconfigurable accelerators for combinatorial problems. Computer, 33(4), 58–60. https://doi.org/10.1109/2.839322
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2000 | Journal Article | LibreCat-ID: 10725
Platzner, M., Rinner, B., & Weiss, R. (2000). Toward embedded qualitative simulation: a specialized computer architecture for QSim. IEEE Intelligent Systems, 15(2), 62–68. https://doi.org/10.1109/5254.850829
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2000 | Journal Article | LibreCat-ID: 10606
Eisenring, M., & Platzner, M. (2000). Synthesis of Interfaces and Communication in Reconfigurable Embedded Systems. IEE Proceedings -- Computers & Digital Techniques, 147, 159–165. https://doi.org/10.1049/ip-cdt:20000496
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