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60 Publications
2023 | Mastersthesis | LibreCat-ID: 46075
Raeisi Nafchi M. Reconfigurable Random Forest Implementation on FPGA.; 2023.
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2023 | Mastersthesis | LibreCat-ID: 45917
Raeisi Nafchi M. Reconfigurable Random Forest Implementation on FPGA. Paderborn University; 2023.
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2023 | Mastersthesis | LibreCat-ID: 45916
Yadalam Murali Kumar N. Data Analytics for Predictive Maintenance of Time Series Data. Paderborn University; 2023.
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2022 | Mastersthesis | LibreCat-ID: 45915
Kaur P. Analysis of Time-Series Classification in Conditional Monitoring Systems.; 2022.
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2022 | Mastersthesis | LibreCat-ID: 45914
Manjunatha S. Dealing With Pre-Processing And Feature Extraction Of Time-Series Data In Predictive Maintenance. Paderborn University ; 2022.
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2022 | Mastersthesis | LibreCat-ID: 45715
Tcheussi Ngayap VI. FreeRTOS on a MicroBlaze Soft-Core Processor with Hardware Accelerators.; 2022.
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2021 | Mastersthesis | LibreCat-ID: 29540
Sheikh MA. Design and Implementation of a ReconROS-Based Obstacle Avoidance System. Paderborn University; 2021.
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2021 | Mastersthesis | LibreCat-ID: 29151
Kashikar C. A Comparison of Machine Learning Techniques for the On-Line Characterization of Tasks Executed on Heterogeneous Compute Nodes. Paderborn University; 2021.
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2020 | Mastersthesis | LibreCat-ID: 21433
Jentzsch FP. Design and Implementation of a ReconOS-Based TensorFlow Lite Delegate Architecture.; 2020.
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2020 | Mastersthesis | LibreCat-ID: 21324
Chandrakar K. Comparison of Feature Selection Techniques to Improve Approximate Circuit Synthesis.; 2020.
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2020 | Mastersthesis | LibreCat-ID: 20821
Jaganath V. Extension and Evaluation of Python-Based High-Level Synthesis Tool Flows.; 2020.
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2019 | Mastersthesis | LibreCat-ID: 52478
Mehta JD. Multithreaded Software/Hardware Programming with ReconOS/FreeRTOS on a Reconfigurable System-on-Chip.; 2019.
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2019 | Mastersthesis | LibreCat-ID: 15874 | 
Lienen C. Implementing a Real-Time System on a Platform FPGA Operated with ReconOS. Universität Paderborn
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2019 | Mastersthesis | LibreCat-ID: 15920
Keerthipati M. A Bitstream-Level Proof-Carrying Hardware Technique for Information Flow Tracking. Universität Paderborn; 2019.
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2019 | Mastersthesis | LibreCat-ID: 15946
Mehta J. Multithreaded Software/Hardware Programming with ReconOS/FreeRTOS on a Recongurable System-on-Chip.; 2019.
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2019 | Mastersthesis | LibreCat-ID: 15883
Kumar Jeyakumar S. Incremental Learning with Support Vector Machine on Embedded Platforms.; 2019.
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2019 | Mastersthesis | LibreCat-ID: 14831
Sabu NS. FPGA Acceleration of String Search Techniques in Huge Data Sets. Paderborn University; 2019.
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2019 | Mastersthesis | LibreCat-ID: 14546
Hansmeier T. Autonomous Operation of High-Performance Compute Nodes through Self-Awareness and Learning Classifiers. Universität Paderborn; 2019.
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2018 | Mastersthesis | LibreCat-ID: 10782
Clausing L. Development of a Hardware / Software Codesign for Sonification of LIDAR-Based Sensor Data. Ruhr-University Bochum; 2018.
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2017 | Mastersthesis | LibreCat-ID: 74
Knorr C. OpenCL-basierte Videoverarbeitung auf heterogenen Rechenknoten. Universität Paderborn; 2017.
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2017 | Mastersthesis | LibreCat-ID: 1157
Witschen LM. A Framework for the Synthesis of Approximate Circuits. Universität Paderborn; 2017.
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2017 | Mastersthesis | LibreCat-ID: 10708
Dietrich A. Reconfigurable Cryptographic Services. Paderborn University; 2017.
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2017 | Mastersthesis | LibreCat-ID: 10666
Riaz U. Acceleration of Industrial Analytics Functions on a Platform FPGA. Paderborn University; 2017.
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2016 | Mastersthesis | LibreCat-ID: 10706
Makeswaran V. Operating System Support for Reconfigurable Cache. Paderborn University; 2016.
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2016 | Mastersthesis | LibreCat-ID: 10707
Ibne Ashraf I. Private/Shared Data Classification and Implementation for a Multi-Softcore Platform. Paderborn University; 2016.
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2016 | Mastersthesis | LibreCat-ID: 10612
Cedric Mertens J. Sprint Diagnostic with RTK-GPS \& IMU Sensor Fusion. Paderborn University; 2016.
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2016 | Mastersthesis | LibreCat-ID: 10616
Nassery AS. Implementation of Bilinear Pairings on Reconfigurable Hardware. Paderborn University; 2016.
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2016 | Mastersthesis | LibreCat-ID: 10617
Amin O. Acceleration of EMTP for Distribution Networks on Data Flow Machines Using the Latency Insertion Method. Paderborn University; 2016.
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2015 | Mastersthesis | LibreCat-ID: 10726
Posewsky T. Acceleration of Artificial Neural Networks on a Zynq Platform. Paderborn University; 2015.
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2015 | Mastersthesis | LibreCat-ID: 10668
Hangmann H. Evolution of Heat Flow Prediction Models for FPGA Devices. Paderborn University; 2015.
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2015 | Mastersthesis | LibreCat-ID: 10671
Haupt C. Computer Vision Basierte Klassifikation von HD EMG Signalen. Paderborn University; 2015.
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2015 | Mastersthesis | LibreCat-ID: 10615
Ahmed AF. Self-Optimizing Organic Cache. Paderborn University; 2015.
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2014 | Mastersthesis | LibreCat-ID: 10701
Koch B. Hardware Acceleration of Mechatronic Controllers on a Zynq Platform FPGA. Paderborn University; 2014.
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2014 | Mastersthesis | LibreCat-ID: 10715
Mittendorf R. Advanced AES-Key Recovery from Decayed RAM Using Multi-Threading and FPGAs. Paderborn University; 2014.
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2014 | Mastersthesis | LibreCat-ID: 10744
Surmund S. Multithreaded Parallelization of Mechatronic Controllers on a Zynq Platform FPGA. Paderborn University; 2014.
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2014 | Mastersthesis | LibreCat-ID: 10640
Brand M. A Generalized Loop Accelerator Implemented as a Coarse-Grained Array. Paderborn University; 2014.
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2014 | Mastersthesis | LibreCat-ID: 10645
Damschen M. Easy-to-Use-on-the-Fly Binary Program Acceleration on Many-Cores. Paderborn University; 2014.
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2013 | Mastersthesis | LibreCat-ID: 10730
Riebler H. Identifikation Und Wiederherstellung von Kryptographischen Schlüsseln Mit FPGAs. Paderborn University; 2013.
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2012 | Mastersthesis | LibreCat-ID: 10754
Wistuba M. Analysis of Pattern Based Model Design and Learning in Computer-Go. Paderborn University; 2012.
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2012 | Mastersthesis | LibreCat-ID: 10650
Dridger D. Design and Implementation of a Nanophotonics Simulation Personality for the Convey HC-1 Hybrid Core Computer. Paderborn University; 2012.
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2012 | Mastersthesis | LibreCat-ID: 10658
Graf T. Adaptive Playouts in Der Monte-Carlo Spielbaumsuche Am Anwendungsfall Go. Paderborn University; 2012.
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2011 | Mastersthesis | LibreCat-ID: 10736
Schwabe A. Analysis of Algorithmic Approaches for Temporal Partitioning. Paderborn University; 2011.
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2011 | Mastersthesis | LibreCat-ID: 10750
Welp D. User Space Scheduling for Heterogeneous Systems. Paderborn University; 2011.
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2010 | Mastersthesis | LibreCat-ID: 10710
Meiche R. FPGA/CPU Multicore-Plattform Für ReconOS/ECos. Paderborn University; 2010.
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2010 | Mastersthesis | LibreCat-ID: 10717
Niekamp M. Transparente Hardwarebeschleunigung Durch Shared Library Interposing. Paderborn University; 2010.
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2010 | Mastersthesis | LibreCat-ID: 10731
Runde B. A Token-Ring Network-On-Chip for Message Passing in ReconOS. Paderborn University; 2010.
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2010 | Mastersthesis | LibreCat-ID: 10752
Wiersema T. Scheduling Support for Heterogeneous Hardware Accelerators under Linux. Paderborn University; 2010.
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2010 | Mastersthesis | LibreCat-ID: 10642
Breitlauch D. Evolvable Cache Controller. Paderborn University; 2010.
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2010 | Mastersthesis | LibreCat-ID: 10697
Knieper T. Hybridization of Global Multi-Objective and Local Search Techniques. Paderborn University; 2010.
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2010 | Mastersthesis | LibreCat-ID: 10629
Boschmann A. EMG-Basierte Ganganalyse. Paderborn University; 2010.
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2010 | Mastersthesis | LibreCat-ID: 10614
Agne A. Virtuelle Speicherverwaltung Für Hardware Threads in Rekonfigurierbaren Systemen. Paderborn University; 2010.
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2009 | Mastersthesis | LibreCat-ID: 10702
Kostin A. Evolvable Robot Controller. Paderborn University; 2009.
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2009 | Mastersthesis | LibreCat-ID: 10746
Tofall M. Compiler for a Custom Instruction Set CPU. Paderborn University; 2009.
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2009 | Mastersthesis | LibreCat-ID: 10749
Warkentin A. Coarse-Grained CGP Model Using Xilinx Virtex5 DSP48E Functional Units. Paderborn University; 2009.
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2008 | Mastersthesis | LibreCat-ID: 10669
Happe M. Parallelisierung Und Hardware- / Software - Codesign von Partikelfiltern. Paderborn University; 2008.
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2007 | Mastersthesis | LibreCat-ID: 10728
Reisch W. Bildverarbeitungs-Architekturen Und -Bibliotheken Für Das Rekonfigurierbare Betriebssystem ReconOS. Paderborn University; 2007.
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2007 | Mastersthesis | LibreCat-ID: 10729
Rethmeier E. Konzeption Und Implementierung Einer Microsoft Windows CE 5.0 Plattform Für Ein ARM-Basiertes Eingebettetes Rechnersystem. Paderborn University; 2007.
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2007 | Mastersthesis | LibreCat-ID: 10647
Defo B. A Comparison of Multi-Objective Evolutionary Algorithms for Automated Circuit Design and Optimization. Paderborn University; 2007.
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2007 | Mastersthesis | LibreCat-ID: 10648
Döhre S. Entwurf Und Implementierung Einer RocketIO-Basierten Kommunikationsschnittstelle Für Multi-FPGA Systeme. Paderborn University; 2007.
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2007 | Mastersthesis | LibreCat-ID: 10623
Beisel T. Entwurf Und Evaluation Eines Parallelen Verfahrens Zur Bildrekonstruktion in Der Positronen-Emissions-Tomographie Auf Multi-Core-Architekturen. Paderborn University; 2007.
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