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60 Publications
2023 | Mastersthesis | LibreCat-ID: 46075
M. Raeisi Nafchi, Reconfigurable Random Forest Implementation on FPGA. 2023.
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2023 | Mastersthesis | LibreCat-ID: 45917
M. Raeisi Nafchi, Reconfigurable Random Forest Implementation on FPGA. Paderborn University, 2023.
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2023 | Mastersthesis | LibreCat-ID: 45916
N. Yadalam Murali Kumar, Data Analytics for Predictive Maintenance of Time Series Data. Paderborn University, 2023.
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2022 | Mastersthesis | LibreCat-ID: 45915
P. Kaur , Analysis of Time-Series Classification in Conditional Monitoring Systems. Paderborn University , 2022.
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2022 | Mastersthesis | LibreCat-ID: 45914
S. Manjunatha, Dealing With Pre-Processing And Feature Extraction Of Time-Series Data In Predictive Maintenance. Paderborn University , 2022.
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2022 | Mastersthesis | LibreCat-ID: 45715
V. I. Tcheussi Ngayap, FreeRTOS on a MicroBlaze Soft-Core Processor with Hardware Accelerators. 2022.
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2021 | Mastersthesis | LibreCat-ID: 29540
M. A. Sheikh, Design and Implementation of a ReconROS-based Obstacle Avoidance System. Paderborn University, 2021.
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2021 | Mastersthesis | LibreCat-ID: 29151
C. Kashikar, A Comparison of Machine Learning Techniques for the On-line Characterization of Tasks Executed on Heterogeneous Compute Nodes. Paderborn: Paderborn University, 2021.
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2020 | Mastersthesis | LibreCat-ID: 21433
F. P. Jentzsch, Design and Implementation of a ReconOS-based TensorFlow Lite Delegate Architecture. 2020.
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2020 | Mastersthesis | LibreCat-ID: 21324
K. Chandrakar, Comparison of Feature Selection Techniques to Improve Approximate Circuit Synthesis. 2020.
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2020 | Mastersthesis | LibreCat-ID: 20821
V. Jaganath, Extension and Evaluation of Python-based High-Level Synthesis Tool Flows. 2020.
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2019 | Mastersthesis | LibreCat-ID: 52478
J. D. Mehta, Multithreaded Software/Hardware Programming with ReconOS/freeRTOS on a Reconfigurable System-on-Chip. 2019.
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2019 | Mastersthesis | LibreCat-ID: 15874 | 
C. Lienen, Implementing a Real-time System on a Platform FPGA operated with ReconOS. Universität Paderborn.
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| Files available
2019 | Mastersthesis | LibreCat-ID: 15920
M. Keerthipati, A Bitstream-Level Proof-Carrying Hardware Technique for Information Flow Tracking. Universität Paderborn, 2019.
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2019 | Mastersthesis | LibreCat-ID: 15946
J. Mehta, Multithreaded Software/Hardware Programming with ReconOS/freeRTOS on a Recongurable System-on-Chip. 2019.
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2019 | Mastersthesis | LibreCat-ID: 15883
S. Kumar Jeyakumar, Incremental learning with Support Vector Machine on embedded platforms. 2019.
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2019 | Mastersthesis | LibreCat-ID: 14831
N. S. Sabu, FPGA Acceleration of String Search Techniques in Huge Data Sets. Paderborn University, 2019.
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2019 | Mastersthesis | LibreCat-ID: 14546
T. Hansmeier, Autonomous Operation of High-Performance Compute Nodes through Self-Awareness and Learning Classifiers. Universität Paderborn, 2019.
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2018 | Mastersthesis | LibreCat-ID: 10782
L. Clausing, Development of a Hardware / Software Codesign for sonification of LIDAR-based sensor data. Ruhr-University Bochum, 2018.
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2017 | Mastersthesis | LibreCat-ID: 74
C. Knorr, OpenCL-basierte Videoverarbeitung auf heterogenen Rechenknoten. Universität Paderborn, 2017.
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2017 | Mastersthesis | LibreCat-ID: 1157
L. M. Witschen, A Framework for the Synthesis of Approximate Circuits. Universität Paderborn, 2017.
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2017 | Mastersthesis | LibreCat-ID: 10708
A. Dietrich, Reconfigurable Cryptographic Services. Paderborn University, 2017.
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2017 | Mastersthesis | LibreCat-ID: 10666
U. Riaz, Acceleration of Industrial Analytics Functions on a Platform FPGA. Paderborn University, 2017.
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2016 | Mastersthesis | LibreCat-ID: 10706
V. Makeswaran, Operating System Support for Reconfigurable Cache. Paderborn University, 2016.
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2016 | Mastersthesis | LibreCat-ID: 10707
I. Ibne Ashraf, Private/Shared Data Classification and Implementation for a Multi-Softcore Platform. Paderborn University, 2016.
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2016 | Mastersthesis | LibreCat-ID: 10612
J. Cedric Mertens, Sprint Diagnostic with RTK-GPS \& IMU Sensor Fusion. Paderborn University, 2016.
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2016 | Mastersthesis | LibreCat-ID: 10616
A. S. Nassery, Implementation of Bilinear Pairings on Reconfigurable Hardware. Paderborn University, 2016.
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2016 | Mastersthesis | LibreCat-ID: 10617
O. Amin, Acceleration of EMTP for Distribution Networks on Data Flow Machines using the Latency Insertion Method. Paderborn University, 2016.
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2015 | Mastersthesis | LibreCat-ID: 10726
T. Posewsky, Acceleration of Artificial Neural Networks on a Zynq Platform. Paderborn University, 2015.
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2015 | Mastersthesis | LibreCat-ID: 10668
H. Hangmann, Evolution of Heat Flow Prediction Models for FPGA Devices. Paderborn University, 2015.
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2015 | Mastersthesis | LibreCat-ID: 10671
C. Haupt, Computer Vision basierte Klassifikation von HD EMG Signalen. Paderborn University, 2015.
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2015 | Mastersthesis | LibreCat-ID: 10615
A. F. Ahmed, Self-Optimizing Organic Cache. Paderborn University, 2015.
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2014 | Mastersthesis | LibreCat-ID: 10701
B. Koch, Hardware Acceleration of Mechatronic Controllers on a Zynq Platform FPGA. Paderborn University, 2014.
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2014 | Mastersthesis | LibreCat-ID: 10715
R. Mittendorf, Advanced AES-key recovery from decayed RAM using multi-threading and FPGAs. Paderborn University, 2014.
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2014 | Mastersthesis | LibreCat-ID: 10744
S. Surmund, Multithreaded Parallelization of Mechatronic Controllers on a Zynq Platform FPGA. Paderborn University, 2014.
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2014 | Mastersthesis | LibreCat-ID: 10640
M. Brand, A Generalized Loop Accelerator Implemented as a Coarse-Grained Array. Paderborn University, 2014.
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2014 | Mastersthesis | LibreCat-ID: 10645
M. Damschen, Easy-to-use-on-the-fly binary program acceleration on many-cores. Paderborn University, 2014.
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2013 | Mastersthesis | LibreCat-ID: 10730
H. Riebler, Identifikation und Wiederherstellung von kryptographischen Schlüsseln mit FPGAs. Paderborn University, 2013.
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2012 | Mastersthesis | LibreCat-ID: 10754
M. Wistuba, Analysis of Pattern Based Model Design and Learning in Computer-Go. Paderborn University, 2012.
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2012 | Mastersthesis | LibreCat-ID: 10650
D. Dridger, Design and Implementation of a Nanophotonics Simulation Personality for the Convey HC-1 Hybrid Core Computer. Paderborn University, 2012.
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2012 | Mastersthesis | LibreCat-ID: 10658
T. Graf, Adaptive Playouts in der Monte-Carlo Spielbaumsuche am Anwendungsfall Go. Paderborn University, 2012.
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2011 | Mastersthesis | LibreCat-ID: 10736
A. Schwabe, Analysis of Algorithmic Approaches for Temporal Partitioning. Paderborn University, 2011.
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2011 | Mastersthesis | LibreCat-ID: 10750
D. Welp, User Space Scheduling for Heterogeneous Systems. Paderborn University, 2011.
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2010 | Mastersthesis | LibreCat-ID: 10710
R. Meiche, FPGA/CPU Multicore-Plattform für ReconOS/eCos. Paderborn University, 2010.
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2010 | Mastersthesis | LibreCat-ID: 10717
M. Niekamp, Transparente Hardwarebeschleunigung durch Shared Library Interposing. Paderborn University, 2010.
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2010 | Mastersthesis | LibreCat-ID: 10731
B. Runde, A Token-Ring Network-On-Chip for Message Passing in ReconOS. Paderborn University, 2010.
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2010 | Mastersthesis | LibreCat-ID: 10752
T. Wiersema, Scheduling Support for Heterogeneous Hardware Accelerators under Linux. Paderborn University, 2010.
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2010 | Mastersthesis | LibreCat-ID: 10642
D. Breitlauch, Evolvable Cache Controller. Paderborn University, 2010.
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2010 | Mastersthesis | LibreCat-ID: 10697
T. Knieper, Hybridization of Global Multi-Objective and Local Search Techniques. Paderborn University, 2010.
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2010 | Mastersthesis | LibreCat-ID: 10629
A. Boschmann, EMG-basierte Ganganalyse. Paderborn University, 2010.
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2010 | Mastersthesis | LibreCat-ID: 10614
A. Agne, Virtuelle Speicherverwaltung für Hardware Threads in Rekonfigurierbaren Systemen. Paderborn University, 2010.
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2009 | Mastersthesis | LibreCat-ID: 10702
A. Kostin, Evolvable Robot Controller. Paderborn University, 2009.
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2009 | Mastersthesis | LibreCat-ID: 10746
M. Tofall, Compiler for a Custom Instruction Set CPU. Paderborn University, 2009.
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2009 | Mastersthesis | LibreCat-ID: 10749
A. Warkentin, Coarse-grained CGP Model using Xilinx Virtex5 DSP48E Functional Units. Paderborn University, 2009.
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2008 | Mastersthesis | LibreCat-ID: 10669
M. Happe, Parallelisierung und Hardware- / Software - Codesign von Partikelfiltern. Paderborn University, 2008.
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2007 | Mastersthesis | LibreCat-ID: 10728
W. Reisch, Bildverarbeitungs-Architekturen und -Bibliotheken für das rekonfigurierbare Betriebssystem ReconOS. Paderborn University, 2007.
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2007 | Mastersthesis | LibreCat-ID: 10729
E. Rethmeier, Konzeption und Implementierung einer Microsoft Windows CE 5.0 Plattform für ein ARM-basiertes eingebettetes Rechnersystem. Paderborn University, 2007.
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2007 | Mastersthesis | LibreCat-ID: 10647
B. Defo, A Comparison of Multi-Objective Evolutionary Algorithms for Automated Circuit Design and Optimization. Paderborn University, 2007.
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2007 | Mastersthesis | LibreCat-ID: 10648
S. Döhre, Entwurf und Implementierung einer RocketIO-basierten Kommunikationsschnittstelle für Multi-FPGA Systeme. Paderborn University, 2007.
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2007 | Mastersthesis | LibreCat-ID: 10623
T. Beisel, Entwurf und Evaluation eines parallelen Verfahrens zur Bildrekonstruktion in der Positronen-Emissions-Tomographie auf Multi-Core-Architekturen. Paderborn University, 2007.
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