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53 Publications


2021 | Mastersthesis | LibreCat-ID: 29540
Design and Implementation of a ReconROS-based Obstacle Avoidance System
M.A. Sheikh, Design and Implementation of a ReconROS-Based Obstacle Avoidance System, Paderborn University, 2021.
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2021 | Mastersthesis | LibreCat-ID: 29151
A Comparison of Machine Learning Techniques for the On-line Characterization of Tasks Executed on Heterogeneous Compute Nodes
C. Kashikar, A Comparison of Machine Learning Techniques for the On-Line Characterization of Tasks Executed on Heterogeneous Compute Nodes, Paderborn University, Paderborn, 2021.
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2020 | Mastersthesis | LibreCat-ID: 21433
Design and Implementation of a ReconOS-based TensorFlow Lite Delegate Architecture
F.P. Jentzsch, Design and Implementation of a ReconOS-Based TensorFlow Lite Delegate Architecture, 2020.
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2020 | Mastersthesis | LibreCat-ID: 21324
Comparison of Feature Selection Techniques to Improve Approximate Circuit Synthesis
K. Chandrakar, Comparison of Feature Selection Techniques to Improve Approximate Circuit Synthesis, 2020.
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2020 | Mastersthesis | LibreCat-ID: 20821
Extension and Evaluation of Python-based High-Level Synthesis Tool Flows
V. Jaganath, Extension and Evaluation of Python-Based High-Level Synthesis Tool Flows, 2020.
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2019 | Mastersthesis | LibreCat-ID: 15920
A Bitstream-Level Proof-Carrying Hardware Technique for Information Flow Tracking
M. Keerthipati, A Bitstream-Level Proof-Carrying Hardware Technique for Information Flow Tracking, Universität Paderborn, 2019.
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2019 | Mastersthesis | LibreCat-ID: 15946
Multithreaded Software/Hardware Programming with ReconOS/freeRTOS on a Recon􏰃gurable System-on-Chip
J. Mehta, Multithreaded Software/Hardware Programming with ReconOS/FreeRTOS on a Recon􏰃gurable System-on-Chip, 2019.
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2019 | Mastersthesis | LibreCat-ID: 15874 | OA
Implementing a Real-time System on a Platform FPGA operated with ReconOS
C. Lienen, Implementing a Real-Time System on a Platform FPGA Operated with ReconOS, Universität Paderborn, n.d.
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2019 | Mastersthesis | LibreCat-ID: 15883
Incremental learning with Support Vector Machine on embedded platforms
S. Kumar Jeyakumar, Incremental Learning with Support Vector Machine on Embedded Platforms, 2019.
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2019 | Mastersthesis | LibreCat-ID: 14831
FPGA Acceleration of String Search Techniques in Huge Data Sets
N.S. Sabu, FPGA Acceleration of String Search Techniques in Huge Data Sets, Paderborn University, 2019.
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2019 | Mastersthesis | LibreCat-ID: 14546
Autonomous Operation of High-Performance Compute Nodes through Self-Awareness and Learning Classifiers
T. Hansmeier, Autonomous Operation of High-Performance Compute Nodes through Self-Awareness and Learning Classifiers, Universität Paderborn, 2019.
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2018 | Mastersthesis | LibreCat-ID: 10782
Development of a Hardware / Software Codesign for sonification of LIDAR-based sensor data
L. Clausing, Development of a Hardware / Software Codesign for Sonification of LIDAR-Based Sensor Data, Ruhr-University Bochum, 2018.
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2017 | Mastersthesis | LibreCat-ID: 74
OpenCL-basierte Videoverarbeitung auf heterogenen Rechenknoten
C. Knorr, OpenCL-basierte Videoverarbeitung auf heterogenen Rechenknoten, Universität Paderborn, 2017.
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2017 | Mastersthesis | LibreCat-ID: 1157
A Framework for the Synthesis of Approximate Circuits
L.M. Witschen, A Framework for the Synthesis of Approximate Circuits, Universität Paderborn, 2017.
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2017 | Mastersthesis | LibreCat-ID: 10708
Reconfigurable Cryptographic Services
A. Dietrich, Reconfigurable Cryptographic Services, Paderborn University, 2017.
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2017 | Mastersthesis | LibreCat-ID: 10666
Acceleration of Industrial Analytics Functions on a Platform FPGA
U. Riaz, Acceleration of Industrial Analytics Functions on a Platform FPGA, Paderborn University, 2017.
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2016 | Mastersthesis | LibreCat-ID: 10706
Operating System Support for Reconfigurable Cache
V. Makeswaran, Operating System Support for Reconfigurable Cache, Paderborn University, 2016.
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2016 | Mastersthesis | LibreCat-ID: 10707
Private/Shared Data Classification and Implementation for a Multi-Softcore Platform
I. Ibne Ashraf, Private/Shared Data Classification and Implementation for a Multi-Softcore Platform, Paderborn University, 2016.
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2016 | Mastersthesis | LibreCat-ID: 10612
Sprint Diagnostic with RTK-GPS \& IMU Sensor Fusion
J. Cedric Mertens, Sprint Diagnostic with RTK-GPS \& IMU Sensor Fusion, Paderborn University, 2016.
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2016 | Mastersthesis | LibreCat-ID: 10616
Implementation of Bilinear Pairings on Reconfigurable Hardware
A.S. Nassery, Implementation of Bilinear Pairings on Reconfigurable Hardware, Paderborn University, 2016.
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2016 | Mastersthesis | LibreCat-ID: 10617
Acceleration of EMTP for Distribution Networks on Data Flow Machines using the Latency Insertion Method
O. Amin, Acceleration of EMTP for Distribution Networks on Data Flow Machines Using the Latency Insertion Method, Paderborn University, 2016.
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2015 | Mastersthesis | LibreCat-ID: 10726
Acceleration of Artificial Neural Networks on a Zynq Platform
T. Posewsky, Acceleration of Artificial Neural Networks on a Zynq Platform, Paderborn University, 2015.
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2015 | Mastersthesis | LibreCat-ID: 10668
Evolution of Heat Flow Prediction Models for FPGA Devices
H. Hangmann, Evolution of Heat Flow Prediction Models for FPGA Devices, Paderborn University, 2015.
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2015 | Mastersthesis | LibreCat-ID: 10671
Computer Vision basierte Klassifikation von HD EMG Signalen
C. Haupt, Computer Vision Basierte Klassifikation von HD EMG Signalen, Paderborn University, 2015.
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2015 | Mastersthesis | LibreCat-ID: 10615
Self-Optimizing Organic Cache
A.F. Ahmed, Self-Optimizing Organic Cache, Paderborn University, 2015.
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2014 | Mastersthesis | LibreCat-ID: 10701
Hardware Acceleration of Mechatronic Controllers on a Zynq Platform FPGA
B. Koch, Hardware Acceleration of Mechatronic Controllers on a Zynq Platform FPGA, Paderborn University, 2014.
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2014 | Mastersthesis | LibreCat-ID: 10715
Advanced AES-key recovery from decayed RAM using multi-threading and FPGAs
R. Mittendorf, Advanced AES-Key Recovery from Decayed RAM Using Multi-Threading and FPGAs, Paderborn University, 2014.
LibreCat
 

2014 | Mastersthesis | LibreCat-ID: 10744
Multithreaded Parallelization of Mechatronic Controllers on a Zynq Platform FPGA
S. Surmund, Multithreaded Parallelization of Mechatronic Controllers on a Zynq Platform FPGA, Paderborn University, 2014.
LibreCat
 

2014 | Mastersthesis | LibreCat-ID: 10640
A Generalized Loop Accelerator Implemented as a Coarse-Grained Array
M. Brand, A Generalized Loop Accelerator Implemented as a Coarse-Grained Array, Paderborn University, 2014.
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2014 | Mastersthesis | LibreCat-ID: 10645
Easy-to-use-on-the-fly binary program acceleration on many-cores
M. Damschen, Easy-to-Use-on-the-Fly Binary Program Acceleration on Many-Cores, Paderborn University, 2014.
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2013 | Mastersthesis | LibreCat-ID: 10730
Identifikation und Wiederherstellung von kryptographischen Schlüsseln mit FPGAs
H. Riebler, Identifikation Und Wiederherstellung von Kryptographischen Schlüsseln Mit FPGAs, Paderborn University, 2013.
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2012 | Mastersthesis | LibreCat-ID: 10754
Analysis of Pattern Based Model Design and Learning in Computer-Go
M. Wistuba, Analysis of Pattern Based Model Design and Learning in Computer-Go, Paderborn University, 2012.
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2012 | Mastersthesis | LibreCat-ID: 10650
Design and Implementation of a Nanophotonics Simulation Personality for the Convey HC-1 Hybrid Core Computer
D. Dridger, Design and Implementation of a Nanophotonics Simulation Personality for the Convey HC-1 Hybrid Core Computer, Paderborn University, 2012.
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2012 | Mastersthesis | LibreCat-ID: 10658
Adaptive Playouts in der Monte-Carlo Spielbaumsuche am Anwendungsfall Go
T. Graf, Adaptive Playouts in Der Monte-Carlo Spielbaumsuche Am Anwendungsfall Go, Paderborn University, 2012.
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2011 | Mastersthesis | LibreCat-ID: 10736
Analysis of Algorithmic Approaches for Temporal Partitioning
A. Schwabe, Analysis of Algorithmic Approaches for Temporal Partitioning, Paderborn University, 2011.
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2011 | Mastersthesis | LibreCat-ID: 10750
User Space Scheduling for Heterogeneous Systems
D. Welp, User Space Scheduling for Heterogeneous Systems, Paderborn University, 2011.
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2010 | Mastersthesis | LibreCat-ID: 10710
FPGA/CPU Multicore-Plattform für ReconOS/eCos
R. Meiche, FPGA/CPU Multicore-Plattform Für ReconOS/ECos, Paderborn University, 2010.
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2010 | Mastersthesis | LibreCat-ID: 10717
Transparente Hardwarebeschleunigung durch Shared Library Interposing
M. Niekamp, Transparente Hardwarebeschleunigung Durch Shared Library Interposing, Paderborn University, 2010.
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2010 | Mastersthesis | LibreCat-ID: 10731
A Token-Ring Network-On-Chip for Message Passing in ReconOS
B. Runde, A Token-Ring Network-On-Chip for Message Passing in ReconOS, Paderborn University, 2010.
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2010 | Mastersthesis | LibreCat-ID: 10752
Scheduling Support for Heterogeneous Hardware Accelerators under Linux
T. Wiersema, Scheduling Support for Heterogeneous Hardware Accelerators under Linux, Paderborn University, 2010.
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2010 | Mastersthesis | LibreCat-ID: 10642
Evolvable Cache Controller
D. Breitlauch, Evolvable Cache Controller, Paderborn University, 2010.
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2010 | Mastersthesis | LibreCat-ID: 10697
Hybridization of Global Multi-Objective and Local Search Techniques
T. Knieper, Hybridization of Global Multi-Objective and Local Search Techniques, Paderborn University, 2010.
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2010 | Mastersthesis | LibreCat-ID: 10629
EMG-basierte Ganganalyse
A. Boschmann, EMG-Basierte Ganganalyse, Paderborn University, 2010.
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2010 | Mastersthesis | LibreCat-ID: 10614
Virtuelle Speicherverwaltung für Hardware Threads in Rekonfigurierbaren Systemen
A. Agne, Virtuelle Speicherverwaltung Für Hardware Threads in Rekonfigurierbaren Systemen, Paderborn University, 2010.
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2009 | Mastersthesis | LibreCat-ID: 10702
Evolvable Robot Controller
A. Kostin, Evolvable Robot Controller, Paderborn University, 2009.
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2009 | Mastersthesis | LibreCat-ID: 10746
Compiler for a Custom Instruction Set CPU
M. Tofall, Compiler for a Custom Instruction Set CPU, Paderborn University, 2009.
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2009 | Mastersthesis | LibreCat-ID: 10749
Coarse-grained CGP Model using Xilinx Virtex5 DSP48E Functional Units
A. Warkentin, Coarse-Grained CGP Model Using Xilinx Virtex5 DSP48E Functional Units, Paderborn University, 2009.
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2008 | Mastersthesis | LibreCat-ID: 10669
Parallelisierung und Hardware- / Software - Codesign von Partikelfiltern
M. Happe, Parallelisierung Und Hardware- / Software - Codesign von Partikelfiltern, Paderborn University, 2008.
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2007 | Mastersthesis | LibreCat-ID: 10728
Bildverarbeitungs-Architekturen und -Bibliotheken für das rekonfigurierbare Betriebssystem ReconOS
W. Reisch, Bildverarbeitungs-Architekturen Und -Bibliotheken Für Das Rekonfigurierbare Betriebssystem ReconOS, Paderborn University, 2007.
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2007 | Mastersthesis | LibreCat-ID: 10729
Konzeption und Implementierung einer Microsoft Windows CE 5.0 Plattform für ein ARM-basiertes eingebettetes Rechnersystem
E. Rethmeier, Konzeption Und Implementierung Einer Microsoft Windows CE 5.0 Plattform Für Ein ARM-Basiertes Eingebettetes Rechnersystem, Paderborn University, 2007.
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2007 | Mastersthesis | LibreCat-ID: 10647
A Comparison of Multi-Objective Evolutionary Algorithms for Automated Circuit Design and Optimization
B. Defo, A Comparison of Multi-Objective Evolutionary Algorithms for Automated Circuit Design and Optimization, Paderborn University, 2007.
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2007 | Mastersthesis | LibreCat-ID: 10648
Entwurf und Implementierung einer RocketIO-basierten Kommunikationsschnittstelle für Multi-FPGA Systeme
S. Döhre, Entwurf Und Implementierung Einer RocketIO-Basierten Kommunikationsschnittstelle Für Multi-FPGA Systeme, Paderborn University, 2007.
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2007 | Mastersthesis | LibreCat-ID: 10623
Entwurf und Evaluation eines parallelen Verfahrens zur Bildrekonstruktion in der Positronen-Emissions-Tomographie auf Multi-Core-Architekturen
T. Beisel, Entwurf Und Evaluation Eines Parallelen Verfahrens Zur Bildrekonstruktion in Der Positronen-Emissions-Tomographie Auf Multi-Core-Architekturen, Paderborn University, 2007.
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