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326 Publications


2016 | Journal Article | LibreCat-ID: 165
G. F. Vaz, H. Riebler, T. Kenter, and C. Plessl, “Potential and Methods for Embedding Dynamic Offloading Decisions into Application Code,” Computers and Electrical Engineering, vol. 55, pp. 91–111, 2016, doi: 10.1016/j.compeleceng.2016.04.021.
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2016 | Conference Paper | LibreCat-ID: 168
A. Lösch, T. Beisel, T. Kenter, C. Plessl, and M. Platzner, “Performance-centric scheduling with task migration for a heterogeneous compute node in the data center,” in Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2016, pp. 912–917.
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2016 | Conference Paper | LibreCat-ID: 171
T. Kenter, G. F. Vaz, H. Riebler, and C. Plessl, “Opportunities for deferring application partitioning and accelerator synthesis to runtime (extended abstract),” 2016.
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2015 | Journal Article | LibreCat-ID: 1769
S. Hegler et al., “Simulative Ultraschall-Untersuchung von Pitch-Catch-Messanordnungen für große zylindrische Stahl-Prüflinge und gradientenbasierte Bildgebung,” tm - Technisches Messen, vol. 82, no. 9, pp. 440–450, 2015.
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2015 | Journal Article | LibreCat-ID: 1772
J. Torresen, C. Plessl, and X. Yao, “Self-Aware and Self-Expressive Systems – Guest Editor’s Introduction,” IEEE Computer, vol. 48, no. 7, pp. 18–20, 2015.
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2015 | Journal Article | LibreCat-ID: 1774
S. Peitz and M. Dellnitz, “Multiobjective Optimization of the Flow Around a Cylinder Using Model Order Reduction,” PAMM, vol. 15, no. 1, pp. 613–614, 2015.
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2015 | Mastersthesis | LibreCat-ID: 1794
M. Lass, Localization and Analysis of Code Paths Suitable for Acceleration using Approximate Computing. Paderborn: Paderborn University, 2015.
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2015 | Mastersthesis | LibreCat-ID: 5413
L. Funke, An LLVM Based Toolchain for Transparent Acceleration of Digital Image Processing Applications using FPGA Overlay Architectures. Universität Paderborn, 2015.
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2015 | Mastersthesis | LibreCat-ID: 5416
T. Löcke, Instance-Specific Computing in Hard- and Software for Faster Solving of Complex Problems. Universität Paderborn, 2015.
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2015 | Mastersthesis | LibreCat-ID: 5419
F. Wallaschek, Accelerating Programmable Logic Controllers with the use of FPGAs. Universität Paderborn, 2015.
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