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9812 Publications


2016 | Bachelorsthesis | LibreCat-ID: 18025
S. Heuchler, Nibbler: Implementing a Turing machine to simulate the Busy Beaver problem. 2016.
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2016 | Journal Article | LibreCat-ID: 1835
S. Schmid, C. Avin, C. Scheideler, M. Borokhovich, B. Haeupler, and Z. Lotker, “SplayNet: Towards Locally Self-Adjusting Networks,” IEEE/ACM Trans. Netw., no. 3, pp. 1421--1433, 2016.
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2016 | Conference Paper | LibreCat-ID: 1836
Z. Derakhshandeh, R. Gmyr, A. Porter, A. W. Richa, C. Scheideler, and T. F. Strothmann, “On the Runtime of Universal Coating for Programmable Matter,” in DNA Computing and Molecular Programming - 22nd International Conference, DNA 22, Munich, Germany, September 4-8, 2016, Proceedings, 2016, vol. 9818, pp. 148--164.
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2016 | Conference Paper | LibreCat-ID: 1837
Z. Derakhshandeh, R. Gmyr, A. W. Richa, C. Scheideler, and T. F. Strothmann, “Universal Shape Formation for Programmable Matter,” in Proceedings of the 28th ACM Symposium on Parallelism in Algorithms and Architectures, SPAA 2016, Asilomar State Beach/Pacific Grove, CA, USA, July 11-13, 2016, 2016, pp. 289--299.
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2016 | Conference Paper | LibreCat-ID: 184
V. Melnikov and E. Hüllermeier, “Learning to Aggregate Using Uninorms,” in Proceedings of the Joint European Conference on Machine Learning and Knowledge Discovery in Databases (ECML/PKDD 2016), 2016, pp. 756–771.
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2016 | Conference (Editor) | LibreCat-ID: 1844
C. Scheideler and S. Gilbert, Eds., Proceedings of the 28th ACM Symposium on Parallelism in Algorithms and Architectures, SPAA 2016, Asilomar State Beach/Pacific Grove, CA, USA, July 11-13, 2016. 2016.
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2016 | Book Chapter | LibreCat-ID: 1845
A. W. Richa and C. Scheideler, “Jamming-Resistant MAC Protocols for Wireless Networks,” in Encyclopedia of Algorithms, 2016, pp. 999--1002.
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2016 | Conference Paper | LibreCat-ID: 186
M. Czech, M.-C. Jakobs, and H. Wehrheim, “Just test what you cannot verify!,” in Software Engineering 2016, 2016, pp. 17–18.
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2016 | Report | LibreCat-ID: 221
M. C. Platenius et al., An Overview of Service Specification Language and Matching in On-The-Fly Computing (v0.3). Universität Paderborn, 2016.
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2016 | Journal Article | LibreCat-ID: 222
T. Wiersema, A. Bockhorn, and M. Platzner, “An Architecture and Design Tool Flow for Embedding a Virtual FPGA into a Reconfigurable System-on-Chip,” Computers & Electrical Engineering, pp. 112--122, 2016.
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